Bolle
Well-known member
As there was some interest in that trading post thread over here I thought we might gather some information on the Mac II and the Daystar adapter here.
One difference this adapter has compared to all other Daystar adapters is that it (besides going into the CPU socket) plugs into the MMU socket that's only found on the Mac II.
Reason for that is that most of the address bus of the logicboard is cascaded behind the MMU like shown in the MC68851 user manual:
View attachment 24504
For the accelerator to be able to access the whole logicboard bus it has to connect right to the physical address bus (behind the MMU) as well as to the logical address bus (between 020 and MMU).
The adapter itself looks pretty straight forward:
All MMU control signals are disconnected as 030 and 040 upgrades don't need those because they have built in MMU features.
Most of the bus control signals connect straight through between the accelerator slot and the 020 socket.
There is a tiny 4096 byte PROM on the adapter (still gotta find a way to read it - it looks like my TL886 does not support the AM27S29 or any of the similar DIP20 512*8 ROMs.
Next to that we have a PAL20L8 that's doing address decoding to generate the chip select for the ROM - that's going to be easy once I find time to hook up the logic analyser.
The trickiest part is going to be the GAL16V8 that looks like it's generating address/data strobe signals to translate between the different busses (physical/logic on logicboard and accelerator)
Any takers for some guesses what the GAL might be doing exactly? *looking at @joethezombie*
One difference this adapter has compared to all other Daystar adapters is that it (besides going into the CPU socket) plugs into the MMU socket that's only found on the Mac II.
Reason for that is that most of the address bus of the logicboard is cascaded behind the MMU like shown in the MC68851 user manual:
View attachment 24504
For the accelerator to be able to access the whole logicboard bus it has to connect right to the physical address bus (behind the MMU) as well as to the logical address bus (between 020 and MMU).
The adapter itself looks pretty straight forward:
All MMU control signals are disconnected as 030 and 040 upgrades don't need those because they have built in MMU features.
Most of the bus control signals connect straight through between the accelerator slot and the 020 socket.
There is a tiny 4096 byte PROM on the adapter (still gotta find a way to read it - it looks like my TL886 does not support the AM27S29 or any of the similar DIP20 512*8 ROMs.
Next to that we have a PAL20L8 that's doing address decoding to generate the chip select for the ROM - that's going to be easy once I find time to hook up the logic analyser.
The trickiest part is going to be the GAL16V8 that looks like it's generating address/data strobe signals to translate between the different busses (physical/logic on logicboard and accelerator)
Any takers for some guesses what the GAL might be doing exactly? *looking at @joethezombie*
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