An IIsi in my SE/30? It's more likely than you think!

zigzagjoe

Well-known member
I've been up to something fun with @Bolle today.

IMG_4101.jpg

Thanks to some hardware hackery by bolle, and baby's first ROM modification for my part, that's an IIsi logic board driving an SE/30 internal screen :)

Storytime: While writing the driver for my 30Video cards, I was consulting the SuperMario (660/840AV) ROM Sources, specifically to review video driver code to sanity check some things I'd done. In there you can find references to a hypothetical SE-form-factor machine that would utilize the RBV (Ram Based Video) video controller from IIsi and IIci. Interesting, but the question was open - how would such a beast actually be wired? Does the software support exist?

Well, @Arbee leaked the RBV datasheet (attached) which makes it clear, and it's very, very simple!

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Lift a pin on the RBV and ground it, easy enough, and Bolle found that it'll even kindly output the special horizontal drive signal (SE.HSYNC) required by SE type analog boards. Grab TTL video from before the RAMDAC, and in theory you've got everything you need to drive the SE monitor: VSync, TTL Video, and the special Hsync.

IMG_4094.jpg
Bolle wired this up and found that the SE video definitely works in hardware. The picture is exactly correct which means the syncs are sane, the pixel clock appears consistent (for uninitialized RAM). The board was upset due to lack of 5vSB, but it can clearly be seen the video is working. This now becomes a problem of software support.

Based on a review of the driver code, it sure looks like there is sResources for the SE type display at multiple depths! Score! (Hypothetical grayscale possibility here!). With any luck this means it'll be a simple tweak to get it to bring the RBV up for an SE monitor.

With an unmodified ROM and a working IIsi board, you only get a black screen. Well, that's fair enough - the PrimaryInit is looking for a specific BoxFlag in order to know if it should bypass the no-monitor-detected condition and initialize video anyways. Normally, the 111 sense code means no monitor, but on the SE-type RBV machine it means no external monitor, enable the internal monitor. As the machine ID is NOT one of the BoxAuroraSE constants, PrimaryInit goes welp, no monitor, time to die and there we end.

So, the first change needed is to tweak that final BEQ (branch on equal) before 'noMon' to an unconditional BRA into the initalization code. 0x67 becomes 0x60, easy enough. WIth a bit of creative searching for hex strings it was possible to identify this section of code in IDA without needing to fully disassemble and RE the lot. Around offset 0x7EEE0, for the record. Using @cy384's CRC calculation tool I send Bolle a new ROM image to try. Unfortunately, this one sad chimes after the memory test, but it works perfectly in SE/30. ROM CRC's good, then.

The odd part? This happens with any monitor detected, and not when there's no monitor connected. Hmmm. Even after patching code that isn't even touched (thus no change in ROM behavior) we'll still get sad chimes. Seems a lot like there's a secondary level of integrity validation being performed on the IIsi image I've been working on. Any time a monitor is present or is hotplugged after boot - immediate death chime. How weird. I also investigated if we could just change the BoxFlag, but as expected most of the neccisary declarations for a new machine type have been stripped out, so the ROM would likely explode in spectacular fashion (and Mac OS would, if the ROM didn't).

Extensive combing of the supermario source doesn't find anything that could explain this behavior. Before giving up I decided to try a later Universal ROM - the Quadra 650 in specific - as I know it will boot an IIsi. The 660AV would have been ideal as it would match the sources 1:1, but alas it will not work in an IIsi. Performed the modification after locating the same code in IDA, and handed it to Bolle... after a search for some suitable flash chips:

IMG_4097.jpg

No joy, and sad chimes again. Progress though! Works with a normal monitor attached. We are definitely further in the boot process.

This is clearly ordered data. There's logic to it, it's not random and happens on each boot. Working theory: This looks much like I might expect lowmems at $0 to potentially look like, if dumped straight into a framebuffer. Which is also where the RBV framebuffer always starts. If the RBV framebuffer is in use, then the MMU is used to remap logical address $0 to a different physical address in RAM. As this is deep voodoo, The RBV memory map has to be set up real early in the boot process, before DRAM is in general use: it probably also needs a case for the SE type machine rather than deallocating the framebuffer as would otherwise be done. If bolle boots with a monitor attached, and detaches it, The SE will display incorrect contents due to the incorrect memory setup/size - but it's doing something sensible. So clearly, the SE setup is not all the way done.

IMG_4096.jpg

Time for some more digging on how the RBV framebuffer is allocated. What's this I spy here? A MMU setup table for the RBV? With an obvious jump table that points to sets of data defining the framebuffer size. And you'll note the entry for 111 - the no-monitor sense code, or the sense for SE-monitor - is 0, where it will later deallocate the framebuffer. Let's change that to 0x10, which is 16 bytes from start of table, the offset to SETable entries. Update checksum. Make sure it seems sensible on my machine: boot with no monitor attached and later attached it, I get the below. This looks a lot like I'd expect for a 512x342 signal with incorrect video timings (VGA). Very promising.

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Sidebar: The RBV docs seem to imply hotplug is possible/planned for, and during earlier testing I definitely found plugging a monitor into a screenless machine would cause the crash immediately at any time post RAM test. There's definitely some kind of dynamic behavior here. Curious how this is being done post boot, as normally monitor sense is a one-and-done affair. The SE video will also turn off immediately for safety (to prevent driving the analog board out of spec). Sidebar over.

OK, hand the ROM with modified MMU table to bolle. What's this?

IMG_4098.jpg

First time that's happened in a few decades!

IMG_4099.jpg

The additional depths are also shown in Monitors and can be switched to, so the sResource setup is good! There's some video glitch in the nondisplay area on the right side, it looks like that is backed by actual VRAM that is simply blanked. It is the same trick to what I did for the 30Video GS card and it may need some cleanup on depth changes. It's what MaxAppleZoom exploited back in the day to get a little extra display real estate.

Very promising! Right now, the display is still 1bit black and white as it's coming directly off the LSB digital output from the RBV but as the RAMDAC should be properly working too grayscale harness could be bodged onto the standard video output for grayscale operation :)

We've less than a day of tinkering on this so far, I'm sure there will be more to come. To-do list: Grayscale testing, figure out what gets the IIsi ROM all bothered, and test possibility that a 512x384 resolution could be used to drive the SE screen. Exciting!
 

Attachments

  • Datasheet CI_RBV.pdf
    3.8 MB · Views: 10

dougg3

Well-known member
That's very, very cool! I had seen the boxFlags for the IIci-based SE/30 and wondered what such a logic board would have looked like or if there are any out in the wild. This is the next best thing!
 

volvo242gt

Well-known member
Nice.

Theoretically, I bet that if a 9" color screen was installed, it might just display 8-bit color.
 

zigzagjoe

Well-known member
Nice.

Theoretically, I bet that if a 9" color screen was installed, it might just display 8-bit color.
No might about it, there's otherwise no special handling so given the presence of the extra bit depths you're getting color past 1bpp. You can see above in the screenshot of monitors where it's missing colors due to just grabbing the lowest pixel from the digital side, but the RAMDAC on the other end of the digital video bus should just be doing its thing resulting in color output. With a few resistors this output should be able to be fed into a grayscale neckboard and get grays.

There's also modes for what they called a modified GS (IIGS?) monitor at 512*384 for a color SE (and also used by the 13" monitor, i think, but would need to check). Probably this is what eventually indirectly led to the color classic, but as long as the special HSync is generated for those settings too (at a somewhat higher horiz frequency) it could perhaps be used in a similar manner to what Bolle does on his grayscale board.

There's a distinct possibility something like a SE/ci could be done with what we've found.
 

Mk.558

Well-known member
Does this present hope for a cheaper alternative for a Micron Xceed greyscale internal video cards?
 

zigzagjoe

Well-known member
Does this present hope for a cheaper alternative for a Micron Xceed greyscale internal video cards?
No, not beyond the already existing options. The only real use for this might be (lots of maybes here) a IIsi/IIci hybrid reloaded into a SE/30 form factor.
 

croissantking

Well-known member
Nice work guys! As well as being an interesting look into an alternative product timeline, the learning from this type of experiment is surely invaluable.

As I understand, a hypothetical SE/30i would have the following headline differences over a SE/30:

- 25MHz CPU and CPU bus
- Support for cache cards and PPC upgrades
- Nubus support with an adapter
- Fast RAM based video with native greyscale support on the 9” CRT, or use an external monitor
 
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bibilit

Well-known member
No, not beyond the already existing options. The only real use for this might be (lots of maybes here) a IIsi/IIci hybrid reloaded into a SE/30 form factor.

Yes, not impossible but probably with a lot of work to create a Frankenstein board.
 

zigzagjoe

Well-known member
Aside from the work that'd go into creating a reloaded SE type board, the build itself would be more difficult than most reloaded boards due to the use of QFPs. It would also require a grayscale-type harness, a neckboard, and maybe something to address issues with softpower.... In my experience the EGRET will pout with its arms crossed and not let the system out of reset if you forcibly power the system, but maybe that can be addressed.

Additional difficulties... a hypothetical PDS slot would be 25mhz, so any synchronous or partially synchronous PDS cards may not work as they need to either be fully asynchronous in respect to strobe timings and/or be able to meet internal timings when provided a 25mhz clock. From what I've heard bus-overclocking IIsi results in most PDS cards and the original nubus riser becoming flakey or not working. Nubus is a possibility, but would require a reloaded/bespoke adapter on top of physical fitment troubles.

Cache cards and cache slot upgrades would be on the table electrically but mechanically remains an open question. PPC, it depends on exactly how the PPC ROMs are used. ISTR those cards have a complete PPC ROM that fully takes over which would then undo our changes to get the video activated.

Definitely some interesting possibilities here but it'll never be a cheap or mainstream affair, if it comes to pass.
 
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Trash80toHP_Mini

NIGHT STALKER
The only real use for this might be (lots of maybes here) a IIsi/IIci hybrid reloaded into a SE/30 form factor.
🤣 FINALLY! @Bolle when did you do that IIsi in SE/30 form factor rats nest? Looked, but can't find that layout from years back. Apparently I'd put a bug in your ear in a thread about this very thing. You PM'd me with the diagram saying you'd been dragged into it. Still got that beauty squirreled away somewhere?
 
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Arbee

Well-known member
This is the kind of fun hack I really love. The idea of combining this with a PPC upgrade would be kind of hilarious.

You can probably eliminate the ROM patches (which would likely be important for making a PPC card work) by just jumping the ID pins appropriately.

https://wiki.mamedev.org/index.php?title=Driver:Mac_68K:Tech_Info:System_IDs says that a IIsi's ID bits are 0111 while the SE/si is 0011, so you just flip 1 ID bit and you should be good to go.
 

zigzagjoe

Well-known member
This is the kind of fun hack I really love. The idea of combining this with a PPC upgrade would be kind of hilarious.

You can probably eliminate the ROM patches (which would likely be important for making a PPC card work) by just jumping the ID pins appropriately.

https://wiki.mamedev.org/index.php?title=Driver:Mac_68K:Tech_Info:System_IDs says that a IIsi's ID bits are 0111 while the SE/si is 0011, so you just flip 1 ID bit and you should be good to go.

I took a look at the ID bits, but at least by the time of the supermario dump it appears the various cases needed to support those IDs had been stripped out (if it ever existed). I would expect it to not boot and or not initialize video if it resulted in a boxflag other than BoxMacIIsi or IIci being set. It is worth trying, though, for the reasons you mentioned.
 

Arbee

Well-known member
Yeah, not many ROM dumps exactly match SuperMario, and the closest ones are quite a bit later than the IIsi.
 

Trash80toHP_Mini

NIGHT STALKER
You can probably eliminate the ROM patches (which would likely be important for making a PPC card work) by just jumping the ID pins appropriately.
Dunno, PPC is way off topic, characteristically insane and in need of a dedicated thread here, but makes more sense to me to start out with a PPC board.

Q630 form factor PPC boards fit for transplant as is. Though well beyond current capabilities. A second gen reloaded PPC board (with cache) like the 5260/6290 makes more sense than any PPC IIci reloaded bodge?

Not listed on the usual sites, but I've run a 512x384 12" RGB 'zaTopper res CRT off a 6360. Can that much higher level output on the internal display connector be adapted to run the SE/SE/30 CRT?
 

Trash80toHP_Mini

NIGHT STALKER
Seems a lot like there's a secondary level of integrity validation being performed on the IIsi image I've been working on. Any time a monitor is present or is hotplugged after boot - immediate death chime.
Might you be wreaking havoc upon the IIsi's Vampire Video buffering that is set up at boot time?
- sense lines detected at startup = 1MB of system memory buffered for use as VRAM.
- no monitor connected = no buffering of first Meg.
- hotplug monitor/sense lines after boot = all kinds of havoc?

Thinking you're tinkering with low level, pre-boot ROM/hardware initialization state after boot in this case?
 

zigzagjoe

Well-known member
Dunno, PPC is way off topic, characteristically insane and in need of a dedicated thread here, but makes more sense to me to start out with a PPC board.

Q630 form factor PPC boards fit for transplant as is. Though well beyond current capabilities. A second gen reloaded PPC board (with cache) like the 5260/6290 makes more sense than any PPC IIci reloaded bodge?

Not listed on the usual sites, but I've run a 512x384 12" RGB 'zaTopper res CRT off a 6360. Can that much higher level output on the internal display connector be adapted to run the SE/SE/30 CRT?

This is kind of missing the point, the goal of this was A) to have fun and B) test a scenario that was part of the original design for the chipset. Nothing about what we do with these things make any kind of sense anyways, it's just to scratch our own particular itches.

Might you be wreaking havoc upon the IIsi's Vampire Video buffering that is set up at boot time?
- sense lines detected at startup = 1MB of system memory buffered for use as VRAM.
- no monitor connected = no buffering of first Meg.
- hotplug monitor/sense lines after boot = all kinds of havoc?

Thinking you're tinkering with low level, pre-boot ROM/hardware initialization state after boot in this case?

No, as changes that do not modify behavior still cause it to fail. For example, changing data bytes or a constant value that wouldn't result in a different jump being taken. This is detailed in the original post.
 

Trash80toHP_Mini

NIGHT STALKER
This is kind of missing the point, the goal of this was A) to have fun and B) test a scenario that was part of the original design for the chipset. Nothing about what we do with these things make any kind of sense anyways, it's just to scratch our own particular itches.
Yep, noted. That was a reply to @Arbee about PPC. Said such was way off topic and in need of a dedicated thread. ;)

No, as changes that do not modify behavior still cause it to fail. For example, changing data bytes or a constant value that wouldn't result in a different jump being taken. This is detailed in the original post.
Re-read that portion of the thread earlier (after edit timeout) and saw you're taking non-hotplug hardware case into account. ROM/Driver playtime is out of my wheelhouse/way over my head, sorry. Might hot plugging after boot be a problem for a stock IIsi setup?

Running SE/30 GrayScale harness from Radius Color Pivot II/IIsi came up in discussions years back. Hopefully you can get 512x384 up and running from analog output on the other side of RAMDAC in the SE/30.

Forget who it was, but decoupling video from the A/B entirely was a valid approach to this problem for running at 640x480. That was done on a modified Classic II A/B by adding a winding bodge to the flyback frame among other things. Wondering if such might be possible for the SE/30 A/B at 512x384 target resolution?

Sorry if pointing to hardware approaches from years past might be considered off topic?
 
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