One trick is to compare a ROM which was updated for 7.5.2+ support, you can see the modifications that add DM2.0 support and what they do. If I remember right, sVidAuxParams controls the names for 7.5.2+, and not sRsrcVidNames.
'sVidAuxParams' isn't awfully well documented... google only finds it in your thread about the Thunder II @ 1600x1200 (which I had forgotten and where you already mentioned this... not getting any younger it seems). It has an entry 123 in the appropriate header (the one you quoted), and that's about it.
I think the answer lies in the "Display Device Driver Guide" technical note, for which I can't find a PDF - just the Apple Doc Viewer document in the Dec'94 developer CD. It does mention a timing directory, but uses the sVidParmDir name (which is a different thing) and the number 123 (sVidParmDir is really 126). The content described matches what I find in the Mac Roms on the internet, that is a single entry to a number. That number is a 'preset' timing entry (this is coherent with
@joevt analysis), and in the Mac Rom it maps to reasonable value.
So I don't think I can get arbitrary names from sVidAuxParams, as it only point to predefined stuff as far as I can tell.
Is there a build log for the QuadraFPGA or NuBusFPGA? I'd be interesting to see the build process!
Not sure what you mean by a build log - from the hardware, gateware, software? The hardware was mostly made by JLCPCB so it's just the KiCad project and the generated files (gerbers, CSV for BoM and placement); the gateware is mostly Litex/migen (with just a touch of occasional verilog); the software is essentially the Rom (built with Retro68) and a couple of CodeWarrior-built INIT for acceleration and audio.
If you mean generating the bitstream, it's a bit of a mess to reproduce, as my Litex is quite outdated so using a current version is an unknown. I've put reference version for the 2.12b/2.13a on GitHub.
Maybe I missed it in the repo, but what speed grade FPGA does this need? Is the (relatively) cheaper 2.13b 1C sufficient?
Speed grade 1 is enough, yes. The 2.13b is already overkill in size (50T), the 2.13a (35T) was the primary target but is discontinued. 2.12b is the current replacement for the 2.13a. I've had some issues with mine (which i need to debug further as some of it might have been timing issues with /STERM that I identified later), but
@Jockelill seems happy with his - the picture he posted for the LC32FPGA is with a 2.12b (as visible on the silkscreen).