What is the performance of the stock machine like when running Tiger? And would your build (made on a dual G5) run both processors of a dual 604e card, do you think? Or is that a limitation in xpostfacto?Just wondering did you make any progress with this?
I recently got a 9600 myself and Have been having much fun playing/experimenting with it
which you can read about here https://forums.macrumors.com/threads/powersurging-to-mac-os-x-10-5-8-power-macintosh-9600-fun.2144305/
And that's even with the original SRAMs installed? You mentioned back in June that you "soldered the original 700MHz 7451 back on and cache is working just fine with that one." Is it still enabling with the 7451, but fails with the 7455?Indeed. The extensions test the cache size and speed and afterwards set the correct registers.
They fail at picking up the cache for testing though and I did not find a way yet to force the cache registers the way I want them.
ReggieSE in OSX won't let me do it.
yeah would be interesting to see what can be doneI did actually start drawing up such a interposer card a couple of years back (or it might have been to replace 7400 series chips with one of the newer ones, I can't remember what mac I was targeting with it) but got board manually drawing the BGA footprint's as I couldn't find them online, I was also a little unsure how well a normal fibreglass PCB would survive being hot air soldered
Maybe it's time for a revisit
ah cool find I had seen the first PDF but not the IBM oneJust posting a couple of files. One is the Motorola/Freescale ZIF datasheet which was linked to earlier. The link is not working. The other is an IBM doc on connecting/configuring L2 cache chips -- but it's only for the 750/G3, not for the G4.
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What is the maximum size for the G4 L3 cache? I ask, because Digikey has some Cypress chips on clearance (no warranty/no returns) which are 250MHz, 512K X 36, $9.10 each. So a pair of them would yield a 4MB L3.
maximum size for L3 cache is generally 2MB the 7457 can "do" 4MB but only up to 2MB of it can be used as L3 cache
I wonder if the L3 cache setup you mentioned can just be used in 2MB mode with the last 2MB ignored?
That's a good idea -- for someone else to do.BTW has anyone contacted sonnet? I hear they are generally quite willing to provide detailed technical info on their old PPC CPU upgrade cards
wonder just how much info we could get from them, schematics, board layout info and any technical notes would be neat! LOL
BTW have you tried contacting sonnet for some details on the CPU card? A friend of mine doing stuff like we do contacted sonnet for info on the TAM G3 upgrade cards and actually got back a good wealth of detail