Another IIci ROM hack

[Dennis Nedry]

256MB of ROM could provide for some interesting hardware-level video projects.

The only reasonable way I can imagine to get that much ROM is to use a serial ROM, like that from a flash drive. To make it parallel, the only reasonable thing I can imagine is to put a program into a small parallel ROM that copies the serial ROM contents into RAM, then passes execution off into RAM. I have no idea what this would do to the OS!! Not good things. But if you don't want to use an OS, then maybe it's okay.

I'm just thinking out loud here.

 

[Trash80toHP_Mini]

HRMMM????????? [}] ]'> IIci Cache Card in a PowerCache Adapter?

The unused PDS of the IIfx also comes to mind, as does the Luggable, which was specifically designed for ROM expansion.

 

[trag]

Should we start thinking about an 8 MB SIMM? The main problem I'm having with early research is it's hard to find 5V chips in bigger sizes. Everything's moving toward 3.3V now.

The Micron part you found is probably a more satisfying choice -- goes all the way to 8 MB -- but I figured I'd mention that I have several hundred HY29F800 chips on hand. They're in a PSOP package instead of the TSOP so they're a little larger 16 X 28mm vs. 12 X 20mm, but they're also easier to solder.

That would get you up to 4MB with four of them.

I have almost 500 of an SST brand 16Mbit part on hand, but they're 3.3V, darn it.

 

[Trash80toHP_Mini]

How complicated, robust or efficient need a 5V->3.3V step down circuit be for that small a load? :?:

 

[trag]

I knew there was a thought in my head trying to get out...

Doug, if you don't mind using the PSOP44 package (what Micron calls the SO44) then you could lay out a board to use either the parts I have on hand, or the full capacity Micron parts. If there's a call for the 8MB capacity you could get the Micron parts, but as long as 4MB is satisfactory, it would be a little cheaper, and get me closer to that day when my attic is empty, to use the HY29F800s that I have on hand.

The downside is that your SIMM will probably be bigger with PSOP44 parts as opposed to TSOP48. The up side is that the pins are almost twice as big and twice as far apart.

jt, it would probably require a full level translator for every pin. That's not terrible, as I think they are available in a X16 package, but that would be roughly two level translator chips per Flash chip. That's a lot of extra stuff on the board. I checked the 39VF016 datasheet, because sometimes the IOs on 3.3V chips are 5V tolerant, but these aren't. The IO pins are rated for Vdd +/- .5V. So 2.8V to 3.8V. Or, if one pushes Vdd up to the maximum of 3.6V, then 3.1V to 4.1V. But 4.1 is still a distance from 5V. Anyway, if the I/Os were 5V tolerant, then one would just need a voltage regulator on board to change the 5V supply to 3.3V, and the I/Os could be hooked up directly, but no such luck. Some 5V memory DIMMs were built like that with 3.3V (but 5V tolerant) parts.

 

[Trash80toHP_Mini]

Curses, foiled again!

)

Since the SIMM Slot appears to (at least to this noob?) address the EEPROMs in banks, would gating the address line translators add to, or reduce, the acreage of the step down circuitry?

Maybe the notion could be useful for the proposed Cache Slot card? :?:

Designing that one from the ground up for higher capacity EEPROMS rather than additional SIMMs/Connectors seems like it would be a much more elegant approach. The IIfx PDS notion got me thinking about a card with thru-holes on top and bottom for a dual purpose PCB design . . .

< over the top mode >

. . . if not provision for different interface connectors on all four sides of a square card! [}] ]'>

< /over the top mode >

 

[dougg3]

Rats, it's too bad the I/Os aren't 5V-tolerant. That's a really good idea and I should probably be checking other various 3.3V parts to see if any of them are 5V-tolerant. I'm assuming here that the voltage regulator wouldn't draw too much current...I don't want to start burning up people's logic boards!

Thanks for the info on your PSOP parts trag! I actually can't make the SIMM any bigger, or much bigger anyway. It will run into clearance problems in the SE/30 otherwise--at least that's what I understood when I was designing the original SIMM. I would be interested in leaving pads for both TSOP and PSOP on a SIMM if I could get them to fit, but it looks like the TSOP and PSOP pinouts are totally different so it would require some trace routing.

I was going to ask the same question about the feasibility of level shifting, so I'm glad you already asked it jt! I don't know anything about level shifting.There are 32 data lines and 24 other shared control lines (21 address lines plus WE,CE,OE), so I'd need a total of 56 pins level shifted. It could be done right near the bottom of the SIMM near the pads that go into the socket. If there are chips with 16, looks like it would take four of them total. I think the easier route (and what I'll probably do) is stick with 5V parts though.

 

[Dennis Nedry]

If you are ever thinking about using a regulator to go from 5V down to 3.3-ish V, you can use series diodes instead of a regulator. Unlike series resistors, diodes will have the pretty much the same voltage drop over a range of different currents. The regulator will get you closer to 3.3, but in a pinch, try the diodes!

< over the top mode >

. . . if not provision for different interface connectors on all four sides of a square card! [}] ]'>

< /over the top mode >

*like*

 

[bbraun]

You'll probably hate me for the suggestion, but... Aside from some address decoding, would it be a huge stretch from ROM SIMM to PDS? Not quite the same thing, but even easier to make bootable (for machines with a PDS slot).

And then put the programmer board and the flash on the same card.

Then again, maybe that can go on the list after the SIMM is done.

 

[Trash80toHP_Mini]

Most PDS machines have different signals on the slots, that's why the electronics are so different on the PowerCache adapters. There are very few that are actually the same, I think Apple mixed it all up on purpose.

 

[dougg3]

Thanks Dennis Nedry for the diode suggestion! That's a great idea and very simple.

I have no idea about the PDS at all...anything like that would have to come after the big SIMM Also, I'm limited by the cheap version of EAGLE. Maybe I'll have to learn KiCad to do more complicated (bigger, or more than 2 layer) boards. I noticed that iTead Studio is doing 4 layer PCBs now...they are very similar to Seeed Studio. So they are a possibility if we need something really fancy.

I hand-routed all 32 data lines, power, and ground. I'm running the auto-router now because frankly this board is harder to route than the 2 MB SIMM. With such a fine-pitch device, there's no room between pads to run lines. I'm probably going to ditch the LEDs on this iteration to make things simpler. Looks like even after the autorouter is done, I'm going to have to manually route some traces it couldn't route. Fun fun fun... 8-o

 

[Trash80toHP_Mini]

Optimizing routing by hand is why we have PCB designers. If hardware/software were to come anywhere near the complexity of the wetware between your ears, we'd be looking at a whole new world.

We're a lonnnngggg way from the likes of Commander Data . . . or even something as simple as deh Terminator. 8-o

I think maybe we're overlooking a simple solution by focusing on the Mac's provision for PDS I/O.

A less aggressive approach could be to make a ROM SIMM adapter board that plugs into the ROM SIMM slot and provides 4 multiplexed slots, not unlike a RAM SIMM Saver.

An actual 72 pin RAM SIMM Saver knock-off may be a more elegant approach. Design a simple Card with a slot for the displaced RAM SIMM as close to the MoBo as possible and a slot or more for the standard ROM SIMMs above it would open the likes of the MicroQuadra 605, the Quadra 630 and all its ROM SIMM socket deprived offspring to ROM SIMM playtime. [] ]'>

I've got a significant quantity of DPST DIP Switches on hand which would make for a more elegant solution than my DuoDock DeclROM power pin hack. [] ]'>

edit: WOOHOO!!!!!!!!!!!!!!! p.31 :approve:

 

[tt]

Wow, a lot of crazy ideas floating around here.

I'm probably going to ditch the LEDs on this iteration to make things simpler. Looks like even after the autorouter is done, I'm going to have to manually route some traces it couldn't route. Fun fun fun...

Sounds like you're on a good approach, keep it simple for fewer headaches in the future. I guess I'll float another suggestion, how about a new color for the new PCB?

Some kind of PDS hardware for the future sounds really cool- all the different flavors of PDS out there is a bummer though.

 

[Trash80toHP_Mini]

A 72 pin RAM SIMM adapter neatly side-steps the Slots of Babel issue. On the MicroQuadras, the 630 and others, disabling the MoBo RAM and jumpering its RAS/Bank select lines to the adapter would allow for TWO RAM SIMM Slots to be active along with a set of ROM SIMMs. [] ]'>

 

[Dennis Nedry]

This RAM/ROM PDS board is a really cool idea jt, and if it works it could certainly integrate all sorts of other upgrades into the future through more revisions.

It worries me that the address lines of ROM are not continuous with the address lines of RAM in the Mac IIci as seen here. It could be something complicated like a RAM controller on the logic board, or something as simple as buffers somewhere on the logic board that make the test fail, so this may be a non-issue, I don't know. For sure, we would need to know how the Mac determines how much RAM is installed. That would tell us a lot.

If it's possible to add RAM via PDS, I don't see any particular reason why we couldn't integrate a modern RAM module slot and fill that baby with a huge module (say 128MB :lol: ), that would be cool.

 

[Trash80toHP_Mini]

THX, Dennis, I'm glad you mentioned the SIMM Saver, that's what gave me the notion for the 72 pin RAM/ROM adapter SIMM. [] ]'>

I'm pretty sure that the problems in the IIci have to do with it being saddled with 30 pin SIMMs and Bank A being buffered for Vampire Video. The ROM SIMM probably has something like two or four times the data lines of a 30 pin RAM SIMM. Dunno offhand, but the IIci already has a SIMM Slot available, like most of the 030 Macs.

The 72 pin RAM SIMM wedge for the ROM SIMMs would be aimed at systems with unimplemented pads (or no pads at all?) for a ROM SIMM that are saddled with PDS Slots of Babel, like the systems I mentioned.

 

[dougg3]

So just so I get this straight, are you guys talking about making something that plugs into a RAM SIMM slot and patches new ROM into it? Does that even work? At least on the IIci, they're all mapped into different spaces physically by the circuitry. The address lines in the ROM SIMM sockets only do ROM addresses. The address lines on the RAM SIMM sockets only do RAM addresses. I could be totally misreading what you guys are talking about though, so forgive me if I'm confused!

As far as the 8 MB ROM SIMM goes, after a few failed auto-route attempts where the failed traces were pretty much impossible to route, I did what I should have done originally. I moved the chips so I now have them in sets of two. The advantage here is the data pins on the chips are now very close to the corresponding SIMM contacts. This opens up much more room for the address lines to be routed. Then I manually routed the VCC traces and data lines before doing the autorouter. This time the autorouter succeeded at routing everything else! I have a TON of cleanup work to do and I will do a lot of manual trace fixing now that the autoroute is complete. So, lesson learned: good placement of components on the PCB is a big deal!

I've got a ground copper pour on the top and bottom of the SIMM. I've connected the top and bottom pours together in multiple places to increase coverage over the whole SIMM and it's looking pretty good Red is the top layer, blue is the bottom layer. If I can, I'd like to increase the copper pour's coverage even more during the trace fix-ups; we'll see what I can do! The picture below is just what the autorouter spit out combined with extra vias I added, and as you can see it's a mess!

I've ditched the small 64-pin header to make more space; thanks to olePigeon, I pretty much have a lifetime supply of 64-pin SIMM sockets.

 

[Trash80toHP_Mini]

Despite the need for optimization, that's a nice lookin' board layout! :approve:

I haven't had a IIci in hand for a almost a decade, so I don't know what its memory I/O scheme looks like. It makes sense that the buses would be differentiated on 30 pin SIMM systems like the IIci, especially with Vampire Video buffering thrown into the mix.

In the 72 pin SIMM models I mentioned, the address and data lines for RAM, ROM and VRAM appear to be one long interconnected bus. Can the CPU address any combination of these simultaneously? Otherwise, I'd think the RAM SIMMs . . .

. . . actually, I'm tired and I don't know WHAT the heck to think. :-/

Does ROM have what is, in effect, a bank select line of its own?

BTW, I have one LC475 with a ROM SIMM Socket and one with empty pads . . . go figure! :

edit: Do I spy room for an LED right smack dab in the middle of the board? }

 

[Dennis Nedry]

I do plan to purchase a programmer and some SIMMs from you eventually dougg3. They are fantastic work. All of my stuff, Macs included, has been packed up and stored for the last 2 years. Hopefully soon I will move to a place where I can actually have room to take these things out and play with them again.

 

[dougg3]

I guess I'll float another suggestion, how about a new color for the new PCB?

Very good idea

Despite the need for optimization, that's a nice lookin' board layout! :approve:

Thanks! Once it's cleaned up I think I'll be happy.

In the 72 pin SIMM models I mentioned, the address and data lines for RAM, ROM and VRAM appear to be one long interconnected bus. Can the CPU address any combination of these simultaneously? Otherwise, I'd think the RAM SIMMs . . .. . . actually, I'm tired and I don't know WHAT the heck to think. :-/

LOL, I know the feeling I'm pretty tired myself.

Does ROM have what is, in effect, a bank select line of its own?

My understanding is that the data bus (D0 to D31) is directly wired to everything -- ROM, RAM, everything else imaginable. Whatever is being addressed is allowed to put stuff on the bus for the CPU to read. The ROM has chip select/output enable pins to tell it when to output data and it has its own address space. A0 of the ROM socket is not wired directly to A0 of the CPU, but rather through some kind of address decoding logic so that it knows the addresses from $40000000 to $50000000 should be passed on to the ROM SIMM's A0 through A20 or whatever. I think RAM behaves slightly differently in regard to where you tell it what to read/write (I've never really looked that up and I should), but it's still the same idea -- I'm fairly sure the RAM socket only has the RAM space wired up. Otherwise, how would each RAM chip know that it's supposed to listen to the section of the machine's address space reserved for RAM as opposed to the address space reserved for ROM or the sound chip or whatever else? Anyway, I haven't researched it much, this is just what I'm thinking off the top of my head. It's very possible I'm forgetting something, but that's just how I'm seeing it in my head...

edit: Do I spy room for an LED right smack dab in the middle of the board? }

I was thinking on the left or right side where there's plenty of space plus VCC and GND available, but yeah...it should be possible to put LEDs back on. :-D

I do plan to purchase a programmer and some SIMMs from you eventually dougg3.

Cool, and thank you! You're probably better off waiting anyway so you can have one of the mega 8 MB SIMMs if they work out bbraun is doing some amazing things with ROM disks and the 8 MB size should make it even more useful. I didn't realize you've had all your Macs packed up; you must be chomping at the bit to get them out and play with them!