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Reproducing the Lisa 2 Card Stack: The CPU Card

warmech

Well-known member
On to unfortunately bigger things! Next up is the CPU card and, boy oh boy, is this going to suck. First and foremost, a huge thank you to user jamesdenton over at LisaList for providing me with a busted CPU card, as he's allowed me to depopulate it and scan it for reference for this task. I need to find someone/somewhere with a 1200dpi scanner that can manage this board, but it will be nice to have a high resolution image set to refer to.

The schematics have been replicated and I'll be starting in on the board layout once I have the scans in hand; all said and done, this was about a weeks worth of work in my free time so I'm happy it went as fast as it did. I got this done in about the same time it took me to do the RAM card's schematics, so I'm going to interpret that as having at least advanced my skills a little bit, lol. I'm not looking forward to laying down all the traces, as the number of them is substantially higher than the RAM card. It may be a couple of weeks before this is ready, but I'm looking forward to it being done.

Here's where I am at the moment - this should look better in a few days, lol...

Screen Shot 2022-08-08 at 1.24.21 AM.png
 

warmech

Well-known member
Okay, small update... well, less an update and more just providing some reference images. They're a bit large, but they're a fraction the size of their TIFF parents. These are unfortunately only 400dpi; I have access to another large format scanner that can go up to 12800dpi (lol, each side of the CPU card would have taken ~8 hours to complete), but no matter what the scans kept coming out fuzzy. I'm looking for something that will do at least 600, but would prefer 1200 or greater. When this all goes to GitHub, better scans will be available there.
 

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mg.man

Well-known member
I'm looking for something that will do at least 600, but would prefer 1200 or greater.
I have an A3 / 5000dpi (optical) flat bed. Will be happy to scan, but you'd need to get the board over to me here in the UK. 🤔
 

warmech

Well-known member
Going to have to take a few days of after-hours progress off on this to rapidly install a drainage system for my yard before round two of heavy rain hits the DFW region this coming weekend. Spent yesterday digging a trench in my back yard to prevent my shop from flooding, so we're just going to fix that now, lol.

In the mean time, here's a quick progress pic to keep y'all posted. I'd say this is around 40% done at the moment:

Screen Shot 2022-08-23 at 10.29.33 AM.png

Also, what the heck is this, Apple?

Screen Shot 2022-08-23 at 10.35.17 AM.png

There are several right-angle traces on this thing, which I always thought was a big no-no due to EMI/cross-talk. Oh well; their engineers probably know better than myself, an untrained hobbyist with no formal education in any of this, lol.

I have an A3 / 5000dpi (optical) flat bed. Will be happy to scan, but you'd need to get the board over to me here in the UK. 🤔

Lol, that might cost a bit! I actually got a lead on an A3 scanner about 100 miles away for dirt cheap, so I may see about picking that up this weekend. Thank you, though! :)
 

mg.man

Well-known member
that might cost a bit!
I don't think so... probably $25 or so I'd guess. Since the board has been stripped of components, it probably doesn't weigh that much. How much is 200 miles worth of fuel over there these days? Im sure it's still a fraction of what it costs here!! 😭
 

warmech

Well-known member
Well, almost two months later and here we are:

front.png
back.png

Not visible are the two inner layers form +5V and ground (well, DGND). This is effectively 100% complete, but I'm trying to get one last piece of cosmetic flair to work before calling it done. The software I'm working with (EasyEDA) does not make it easy to render the top and bottom substrates translucent by way of removing the masking/paste layers, so I'm trying to figure that out presently. As you can see with the front side, only the "1" is visible in the layer indicator, when it should look like this:

Screen Shot 2022-09-19 at 12.19.26 AM.png

Oh well, I'll get there eventually. Either way, my goal of finishing by the end of the weekend has been met, so I'm happy at the moment. In all, this card has over 1,800 traces that were reproduced by hand - no autorouting, just manually tracking each net by hand. Some license was taken when arranging the final traces but they are, in both count and connectivity, a 1:1 match to the original card; that is to say, this card is an electrically equivalent reproduction of the original PCB with a couple of minor updates. Which brings me to...

Updates! After speaking with AlexTheCat123 over at LisaList, I decided to keep this as close to the original hardware as possible save for a couple quality of life improvements:
  • Connections requiring factory bodge wires have been corrected; the original broken traces are absent from the card and their bodged corrections have been routed as proper traces.
  • The +5V jumper from the CPU section of the schematics has been made more apparent, with a J1 designation of the front of the card.
I didn't keep close track of my time but I'd estimate that there's between 80-100 hours in this thing by now, all of which I would say are worth it. This is a cool piece of Apple history that is now preserved at the informational level and, for that, I am very excited. For now, though, I'm going to set this thing aside for a couple of days and clear my head. Mid-week I'll come back with fresh eyes and take another very close look at everything to check for issues; just because there are no DRC errors doesn't mean it's ready to set sail.

If anyone has experience with EasyEDA and can point me in the right direction with respect to rendering a section of a top or bottom layer translucent, hit me up!

Will,
 

warmech

Well-known member
This is really nice work. Well done.
Thanks!

Quick update for anyone following. Version 1.0 of the PCB is going to get a second set of eyes doing one last sweep and then it's off to fabrication. With the help of the person working on the I/O card, we (they, really) were able to figure out how the layer indicator transparency needed to work, so that's all settled out. If all turns out well and no further revisions are required, this might very well be a done deal by the end of next weekend! If so, expect a link here to GitHub with high-res scans of RAM and CPU cards; Gerber files; exports of the EasyEDA projects (if anyone wants to tool around with the designs); and documentation for the cards.

Screen Shot 2022-09-22 at 2.00.10 PM.pngScreen Shot 2022-09-22 at 2.00.34 PM.png
 
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