I was lucky enough to get my hands on one of zigzagjoe's prototype boards and have a couple of notes to share.
My main interest in getting my hands on one was to validate my ethernet card with it - on that front, I'm happy to say that it works really well, and the faster processor does wonders for network throughput, confirming my suspicion that networking performance on the SE/30 is largely CPU-bound, rather than IO bound.
However, the same can't be said for my RasterOps ColorBoard 264. With the accelerator installed, it never displays its splash screen, and the system locks up hard at the point in the boot process where the driver would normally load. We chased this down to an *extremely* lazy
DSACK rise time - so slow that it was causing the bus cycle *after* an access to terminate prematurely because it was still at a logic-low voltage well into the next cycle, with often disastrous counsequences.
The channels in the attached scope trace are:
- Board select (/AS & addr=0xFBxxxxxx)
- /DSACK0
- /DSACK1
- /AS
You can see how the second access to the board terminates immediately while
/DSACK1 meanders its way back up - but then an access to some other address has nice sharp
/DSACKx edges.
It's still a bit of a mystery as to why the rise time is so slow on that card specifically - adding extra pullup resistors to
/DSACK made things a little bit better but didn't fix it entirely. I was able to get it mostly working by adding some external logic to explicitly drive
/DSACK0 and 1 high during the period between
/AS getting deasserted and the next cycle starting. With this brute force 'fix' in place, the card mostly works, but occasionally has display glitches as though some writes aren't quite making it through. I suspect that it's just not quite up to the tighter timing requirements imposed by the faster processor.

C'mon DSACK, you're letting the side down!

Success! (sort of)