Synchr030/S 256MB SDRAM Accelerator for the SE/30

[zigzagjoe]

Shadowing in 32-bit mode doesn't modify the MMU tables. My Booster PCB says V1.2.

Yes, that buffers the clock for upstream cards. I don't know when Bolle introduced clock buffering in his risers, it may have been on all of them. If your card works on top of the booster, though, then it would seem like clock delay isn't it.

How do you do the ROM shadowing? Just updating trap addresses instead, perhaps? I was thinking you were copying the ROM contents at 0x40000000 to another address within card RAM, then just using the MMU to map 0x400000000 to the new address.

 

[ymk]

If your card works on top of the booster, though, then it would seem like clock delay isn't it.

It does. After modding the Booster's clock input, they work in either order.

How do you do the ROM shadowing? Just updating trap addresses instead, perhaps? I was thinking you were copying the ROM contents at 0x40000000 to another address within card RAM, then just using the MMU to map 0x400000000 to the new address.

In 32-bit mode, the traps are modified. In 24-bit mode, the MMU tables are modified.

 

[ymk]

Norton System Info v3.1 benchmarks:

System: 7.1
Disk cache: 32KB
Storage device: MacSD at 57MHz
Neither accelerator has an FPU installed.

 

[zigzagjoe]

Norton System Info v3.1 benchmarks:

System: 7.1
Disk cache: 32KB
Storage device: MacSD at 57MHz
Neither accelerator has an FPU installed.

View attachment 78743

Nice data! It could be interesting to control for ROM shadowing enabled vs. disabled, to understand which routines are benefiting from faster access to code (video tests) vs. those tests benefiting from faster access to RAM (some CPU tests).

 

[Joopmac]

Wow crazy cool development. Once one could verify it works with rominatorII and carrera040 i am ready to order

 

[ymk]

Wow crazy cool development. Once one could verify it works with rominatorII and carrera040 i am ready to order

Rominator II or equivalent is required to use the full 256MB. Carrera040 hasn't been tested yet.

Nice data! It could be interesting to control for ROM shadowing enabled vs. disabled, to understand which routines are benefiting from faster access to code (video tests) vs. those tests benefiting from faster access to RAM (some CPU tests).

I tested with MacBench 3.0 since it shows more tests and they're less noisy than Norton. Results are shown as a percentage of stock SE/30 numbers. Drawing functions involving curves and arcs seem to benefit the most, probably because they're too large to fit into L1.

A negligible improvement from shadowing may indicate the trap has been patched by System 7.1 and is already SDRAM-resident. The figures in the "Disabled" column are from a mix of ROM and SDRAM resident traps.

 

[Jockelill]

Thanks!



The card does use /STERM, but can also use /DSACK. /STERM is the proper setting with the stock CPU.

It's not just a matter of asserting /STERM in time, but having valid data ready. You mention caches can't do a tag lookup fast enough (which is typically SRAM), so pulling data from SDRAM in less time is a challenge. That's where /ECS is essential. A bus retry would incur a huge performance penalty and defeat the whole purpose. The logic on this card makes no connection to the signals needed for a bus retry.

Apple did include /ECS on the IIfx PDS, but on the SE/30, the signal is N/C. Without it connected, the card falls back to three cycle reads. You can see the impact of this on benchmarks (second vs third bars).



It is not an open source design.

Incredible job! Really well done!! It would be very, very interesting with a version for the IIfx, but I assume there might be some timing issues of of course the space might be an issue. 64pin SIMMs for the IIfx is anyway rare and super fast 256DRAM in the IIfx would be very compelling .

 

[ymk]

Incredible job! Really well done!! It would be very, very interesting with a version for the IIfx, but I assume there might be some timing issues of of course the space might be an issue. 64pin SIMMs for the IIfx is anyway rare and super fast 256DRAM in the IIfx would be very compelling .

Physical space shouldn't be a problem for the IIfx. This card is larger than it needs to be due to the PDS passthrough.

It would be tough to beat the FMC's 64MB/s cache bandwidth.

 

[Cory5412]

This looks super fun, what a novel idea and also that looks like a pretty great genuine speedup just on the RAM access alone.

Great work!

 

[robin-fo]

I wonder how well this concept would be suitable for other machines (the IIsi for example supports up to a gigabyte of RAM including the addresses used by both banks)

 

[ymk]

Thanks!

A zero-wait controller for the IIsi would push this grade of SDRAM a bit beyond its limit. It would also have to work around the soldered 1MB.

 

[Melkhior]

I wonder how well this concept would be suitable for other machines (the IIsi for example supports up to a gigabyte of RAM including the addresses used by both banks)

Having added 240 MiB to a IIsi with the IIsiFPGA (though reads are much slower than this, as the DDR3 is connected to the FPGA itself so requests go through it), you really don't want that much memory in there. No software needs (or even benefits from), that much memory, and it makes cold booting veeeeeeeery slow unless you disable all testing in ROM. A normal IIsi can take 65 MiB of RAM, and honestly you don't really need more than that. If your software does, then you probably should be using a Quadra or similar...

It's true for the SE/30 as well, they probably don't need that much memory either. But SDRAM doesn't really come in small sizes, and if 256 MiB works, why not?

 

[Jockelill]

Thanks!

A zero-wait controller for the IIsi would push this grade of SDRAM a bit beyond its limit. It would also have to work around the soldered 1MB.

I’d be willing to desolder the onboard ram in the name of science .

 

[ymk]

I’d be willing to desolder the onboard ram in the name of science .

Same here, but I don't expect many would. There's little point in a 20MHz version when the IIsi is so easily bumped to 25MHz.

No software needs (or even benefits from), that much memory, and it makes cold booting veeeeeeeery slow unless you disable all testing in ROM.

That's what the Rominator II is for. Some software benefits from the quantity, but nearly all benefits from the speed.

 

[Joopmac]

Ordered mine, will update results with Carrera040=)

 

[Franklinstein]

This thing is bonkers. 256MB in an SE/30? Completely ridiculous.

I just bought one. Excellent work, all.

 

[ymk]

Ordered mine, will update results with Carrera040=)

Great! You're probably aware already, but don't plug it directly into the PDS passthrough.

Some software that could benefit from 256MB: Linux/BSD

Linux/m68k for Macintosh - The Linux/m68k for Macintosh FAQ

11. How much RAM?​

The Linux/m68k port requires about the same amount of RAM as the other Linux ports. 4 MB is no longer enough to load a 2.2 kernel and a RAM disk. Even 5 MB is stretching it. System 7.0.1 uses less memory than the later releases; you may want to try it if you have a low memory machine and you are using Penguin. Note that EMILE requires less RAM than MacOS + Penguin. If you intend to run Debian 3.0, you are looking at a more usable minimum of 32 MB. As of 2019, Debian/m68k needs 64 MB or it won't boot at all.

 

[Joopmac]

No not aware, is there a read me I should go through?

Edit: I also have the combo ethernet card from
Bolle installed, can I plug the Synchr030 in this one?
Synchr030 on the upper slot and the Carrera lying flat

 

[ymk]

No not aware, is there a read me I should go through?

Edit: I also have the combo ethernet card from
Bolle installed, can I plug the Synchr030 in this one?
Synchr030 on the upper slot and the Carrera lying flat

You can find the manual here.

Since the Synchr030/S has a PDS passthrough, you don't want to plug anything into it that you wouldn't plug directly into the logic board, or damage may result.

I have one of Bolle's risers, which I believe is like your ethernet card minus the ethernet bits. Synchr030/S does not work plugged into the vertical passthrough on that riser with the P33. It may for the Carrera. For the P33 to work, Synchr030/S plugs into the logic board, then the riser plugs into that, with the P33 wrapping around the drive cage vertically. I suspect clock buffering may be the issue.

 

[Joopmac]

Will await the delivery and start messing around with it =) Thanks