ZaneKaminski
Well-known member
Now that our Mac II ROM SIMM is almost finished, my friend Garrett and I are getting ready to move on to some of our future classic Mac projects. Next on the to-do list is our "ROMBUS" microSD interface for Mac Plus and 512K. One of our Mac Pluses is broken (E0122 SCR is dead), and the other one's flyback isn't doing so well.
So I figured that we would ditch the analog boards and run the Mac Plus digital boards mounted to a sheet of plywood. This would make swapping out the ROMBUS during development easier too. It's easy to hook up an ATX PSU to power the board, but without the analog board, how do you get the video out? I considered a few approaches and was going to do something like bbraun's STM32F4-based video interface for the Mac SE. Right before I was gonna go to bed, though, I got an idea for a really simple VGA interface, so I stayed up all night doing a board design and fleshing out the basic details. This was a few weeks ago, and I got the design back out last night to finish it up. Here's a picture of the board:
The board solders onto the Mac's 68000 and hooks it up to an old Lattice MACH5 CPLD. The MACH5 outputs the VGA signals directly and controls two 128k x 8 SRAM chips used as framebuffer RAM.
The state machine in the CPLD must shift out one pixel per 25 MHz clock cycle. (25 MHz being the pixel clock for 640x480 VGA.) Since the system has a 16-bit framebuffer data bus width, and the Mac has 1-bit video, the system must read video data from framebuffer RAM every 16 cycles. Therefore, operation of the state machine is divided into "video cycles" consisting of 16 clocks. The 16 states per video cycle are numbered S0-S15. In S0-S11, the system listens for a write to video memory coming from the 68000 and commits it to onboard framebuffer memory. In states S12-S15, the system reads 16 bits from the framebuffer RAM which will be shifted out over the subsequent video cycle. While this video read operation is ongoing, writes coming from the 68000 are held off and are not committed to framebuffer RAM. This holdoff period lasts 160 nanoseconds, but the Mac takes more than 500 nanoseconds to do a memory access, so the VGA interface does not "miss" any writes which occur during this time. Any video write occurring during this time can can just happen in the next S0-S1 states.
That's the gist of it. Unfortunately the video output will suffer from vsync tearing, since the VGA output is not synchronized to the Mac's VBL, but it's good enough to let me use a Mac outside of the case. We're gonna send the board to manufacturing in the next few days, along with the 8MB ROM SIMM and a few other things... hopefully it works!
I don't think we can really sell this thing, since you have to solder it on and it has the vsync tearing, but anyone who wants this is welcome to build one, or I would be willing to sell them for the cost of parts to others doing a project on the 128/512/Plus who wanna run the board outside of the case.
Source is here: https://github.com/ZaneKaminski/MacPlusVGA I have not yet compiled the verilog, and there are a few oversights in the state machine which need to be worked out... I'll do that soon.
So I figured that we would ditch the analog boards and run the Mac Plus digital boards mounted to a sheet of plywood. This would make swapping out the ROMBUS during development easier too. It's easy to hook up an ATX PSU to power the board, but without the analog board, how do you get the video out? I considered a few approaches and was going to do something like bbraun's STM32F4-based video interface for the Mac SE. Right before I was gonna go to bed, though, I got an idea for a really simple VGA interface, so I stayed up all night doing a board design and fleshing out the basic details. This was a few weeks ago, and I got the design back out last night to finish it up. Here's a picture of the board:
The board solders onto the Mac's 68000 and hooks it up to an old Lattice MACH5 CPLD. The MACH5 outputs the VGA signals directly and controls two 128k x 8 SRAM chips used as framebuffer RAM.
The state machine in the CPLD must shift out one pixel per 25 MHz clock cycle. (25 MHz being the pixel clock for 640x480 VGA.) Since the system has a 16-bit framebuffer data bus width, and the Mac has 1-bit video, the system must read video data from framebuffer RAM every 16 cycles. Therefore, operation of the state machine is divided into "video cycles" consisting of 16 clocks. The 16 states per video cycle are numbered S0-S15. In S0-S11, the system listens for a write to video memory coming from the 68000 and commits it to onboard framebuffer memory. In states S12-S15, the system reads 16 bits from the framebuffer RAM which will be shifted out over the subsequent video cycle. While this video read operation is ongoing, writes coming from the 68000 are held off and are not committed to framebuffer RAM. This holdoff period lasts 160 nanoseconds, but the Mac takes more than 500 nanoseconds to do a memory access, so the VGA interface does not "miss" any writes which occur during this time. Any video write occurring during this time can can just happen in the next S0-S1 states.
That's the gist of it. Unfortunately the video output will suffer from vsync tearing, since the VGA output is not synchronized to the Mac's VBL, but it's good enough to let me use a Mac outside of the case. We're gonna send the board to manufacturing in the next few days, along with the 8MB ROM SIMM and a few other things... hopefully it works!
I don't think we can really sell this thing, since you have to solder it on and it has the vsync tearing, but anyone who wants this is welcome to build one, or I would be willing to sell them for the cost of parts to others doing a project on the 128/512/Plus who wanna run the board outside of the case.
Source is here: https://github.com/ZaneKaminski/MacPlusVGA I have not yet compiled the verilog, and there are a few oversights in the state machine which need to be worked out... I'll do that soon.
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