Cloning the Interware Booster 30

[max1zzz]

Will JLPC(?) boards with more than just the teensies pre-installed be possible?

Unfortunately not, all parts for JLC assembly have to come form LCSC who aren't going to have stock of the 68030 of GAL

Are you switching to socketed CPU, sounds like it.

There will be a revision with a PGA CPU, currently my design is using the QFP part the same as the original board

When you do your layout, maybe run all the 030 signals to a PDS passthru? Got notions about implementing that one.

Already been thinking about this It's on this list of things that may be done in future revisions

 

[max1zzz]

The board has been sent to JLC

J

 

[mg.man]

Ooo... way cool! Thanks for the credit on the silkscreen!

 

[Trash80toHP_Mini]

@max1zzz any progress to report, ETA for ProtoBoards?

You have so many projects going it would be great if you could do a Max's Bench thread listing links to any that are publicly posted. I'll bet I'm not the only one who can't keep track of your work. You never know where someone might come up with an idea or suggestion for one of them or add more ideas for projects to overflow of your workspace.

 

[max1zzz]

@Trash80toHP_Mini Boards are on their way, ETA is currently Monday

My publicly posted projects are currently posted on GitHub: https://github.com/max234252/ The main issue I have with posting them there (or anywhere) is getting the "paperwork" (BOM etc) for the release done.... I still need ot do the BOM for the LC II board so I can get that uploaded too

 

[Trash80toHP_Mini]

I meant a thread here in hacks to point to such repositories for such projects and the threads that bred them. Kinda like may ancient jt's hacks thread.

 

[max1zzz]

They are here at last!

 

[max1zzz]

And a assembled and slightly fluxy example:

And the good news is it works! Well it mostly works... If you don't install the FPU it works out of the box but installing the FPU was causing a System Error on boot. turns out I made a couple of mistakes with the FPU connections, firstly I connected A0 to GND not VCC and secondly pin 43 was left floating rather than being connected to VCC, correcting both these got the board working with the FPU

These are a bit annoying but should all be able to be patched under the FPU socket so it's not the end of the world

 

[mg.man]

So now... it's time for FASTER, FASTER!!...

Well done so far!!

 

[max1zzz]

An interesting development, I have discovered the PT7C4511 clock multiplier IC I intended to use dose not work in this design, however the substitute I was using (ICS511M) during development dose. The issue is that the PT7C4511 dose not appear to be able to supply enough current on it's clock output to drive the clock inputs of the 68030, 68882 and GAL all at once. When directly connected the amplitude of the clock output drops to below 2v

Looking through the data sheets again it looks as if the PT7C4511 may be only specced to drive half as much current on the output as the ICS511M (Though neither is that clear on what their maximum drive current is)

This can be rectified by using a 74F00 as a buffer on the clock output so future board revisions will have a option for this

 

[Phipli]

Yeah that Moto chip basically is there to double the incoming frequency (which would be 16MHz in an LC/LCII/CC) to drive the new CPU (which is 33MHz here). Interware had a few cards that operated like this. Personally I don't know why they bothered with the one specifically for the IIvi (basically, at 33MHz with some cache, it turns it into a Performa 600) because it's such a tiny piece of an already tiny market but whatever. I have one though and I pondered using it in an SE/30 with one of the IIci adapters because it's faster than stock, especially with the SRAMs, but not as fast (or nearly as expensive) as the proper Booster 30-SE50F model, though the latter doesn't have cache which adversely impacts performance on that 16MHz bus.

I have one too. Plan on trying it in my IIx, but need to socket the CPU first.

 

[superjer2000]

And a assembled and slightly fluxy example:
View attachment 41715
And the good news is it works! Well it mostly works... If you don't install the FPU it works out of the box but installing the FPU was causing a System Error on boot. turns out I made a couple of mistakes with the FPU connections, firstly I connected A0 to GND not VCC and secondly pin 43 was left floating rather than being connected to VCC, correcting both these got the board working with the FPU

These are a bit annoying but should all be able to be patched under the FPU socket so it's not the end of the world

Out of curiosity any benchmarks on the speed up offered by this board? Curious given the LC II’s 16 bit data path how much of a bottleneck that is and how this compares to an LC III?

 

[max1zzz]

Out of curiosity any benchmarks on the speed up offered by this board? Curious given the LC II’s 16 bit data path how much of a bottleneck that is and how this compares to an LC III?

Depending on which benchmark you use it's about 15-50% faster than the stock - ill take some pictures of more in depth results next time I boot my test LCII up

Benchmarks seem to be somewhat unreliable on the LCII though, I was trying clock chipping one the other day and the benchmarks where not showing any improvement which I find really had to belive

 

[max1zzz]

Finally got around to starting work on the easy-assembly through hole version of the card:

This is going to retain one surface mount component - the clock multiplier, Ideally I would swap this for a DIP part but I'm not aware of any modern clock multiplier IC's in a DIP package

Still got lots of multicolour spaghetti to draw but so far this hasn't been as much of a pain to do as I imagined

 

[CC_333]

I need to learn how to do this (creating KiCAD designs)....

c

 

[MOS8_030]

An admirable achievement!

 

[cheesestraws]

Nice stuff!

I need to learn how to do this (creating KiCAD designs)....

PCB layout is very satisfying even just as a beginner, to be honest (I am a beginner). Would recommend giving it a go if you think it might be fun

 

[Bolle]

May I make a few suggestions to make things nicer and cleaner?
Simple basic rule when routing PCBs: keep traces as straight and as short as possible and use as few vias as possible.

You have some unnecessary bends in traces that could just go straight, making them longer than they need to be.
Also try to pay attention to giving things a bit of space instead of having traces wrap around the keepout area around pins and solder pads - use the raster instead to cleanly route them through in between two pads keeping as much distance to the pads itself as possible.

Also for each signal layer decide for a general direction the traces should go... For example stick to mostly horizontal traces on the red layer and vertical on the green one - or vice versa.
If you're not doing that you end up with way more spaghetti than necessary and you'll have a lot of traces just passing short distances over/under each other which means you'll need more vias.

Those are some good and simple practices to get used to right from the beginning. It might not matter much on low speed and simple boards like this one, but as soon as space gets tight and you're doing more than 4 layers vias are going to take up valuable space that you'd need for traces.



Also from looking at the ratsnest it might make sense to turn the CPU by 90° counter clockwise or the FPU by 90° clockwise to make things easier.

 

[max1zzz]

I need to learn how to do this (creating KiCAD designs)....

I'll echo what @cheesestraws said: just give it a go!

May I make a few suggestions to make things nicer and cleaner?

Of course! I'm far from a expert here
It was already my intention to move those traces away from the pads, I normally try and space traces between pins as far out from the pins as I can but only didn't this time as it was quicker not to (and I had no idea how I was going to lay the board out so just had to start somewhere)

I'll try straitening out those traces, the bendyness of them mostly results for me trying to keep them close together to save on space but I can see how this might actually be counterproductive

and I'll try rotating the chips as suggested and see if that makes the layout easier

Thanks

 

[Trash80toHP_Mini]

I've gotta learn how to do this as well. Putting off 'til retirement, but that's looking line 24 months instead of six now. Thankfully I've got AI to do the simple adapter boards I'm planning . . .

. . . then enlist some help.