Signal RCST# On Beige G3 ROM Module?

[trag]

Anyone know what this signal does? It's connected to pin 35. It's shown on this schematic (page 6)

https://www.macdat.net/files/pdf/apple/schematics/apple/powermac_g3_gossamer.pdf

On actual ROM DIMMs, on most of them it's not connected to anything. On the 820-0961A module it goes to a resistor position, the other pad of which goes to pin 12 of the Flash/ROM chips, which is Chip Enable. But resistor is not installed, suggesting that CE on these modules is just left floating, which is bad practice. Definitely not Grounded the way it (CE_) should be.

I'm looking for a pin that perhaps should be used for RY/BY#

 

[trag]

Never mind. CE# of the chips is tied to pin 115 on the DIMM. Grackle (MPC106) has two RCS signals, RCS0 and RCS1 and the former goes to pin 115 and the latter to pin 35, but pin 35 is not connected to anything on the DIMM except that blank resistor.

Also, signal name is probably RCS1#, not RCST. But on the schematic there's a line on top, instead of a #, so it makes the 1 look like a T.

 

[DBJ314]

Does this mean Gossamer has all the connections to allow a 16MB ROM DIMM? Or a DIMM that is 8MB ROM and 8MB SRAM in a really weird spot? It looks like it might work.

 

[stynx]

Does this mean Gossamer has all the connections to allow a 16MB ROM DIMM? Or a DIMM that is 8MB ROM and 8MB SRAM in a really weird spot? It looks like it might work.

No. The RCS1 is used to read status bits instead.



There is a BurstCAP signal (Burst Capacitor?) that is connected to the ROM socket and i suspect that the signal is used to read if the Flashrom is ready after programming without selecting the ROMs itself. Its most likely a bit of trickery to get the right time when all Flash-chips are ready to be accessed after programming.

 

[DBJ314]

No. The RCS1 is used to read status bits instead.

A pity. While it might be possible to attach ROM chips to the unused byte lanes (assuming that doesn't mess up the code which reads the status bits), it wouldn't be possible to just directly jump to code there or put a filesystem there. The data would have to be reconstructed somewhere else first (like what the Slot Manager does to handle DeclROMs that might be attached to (almost) any combination of Nubus byte lanes). Not as fun.

 

[joevt]

There is a BurstCAP signal (Burst Capacitor?) that is connected to the ROM socket and i suspect that the signal is used to read if the Flashrom is ready after programming without selecting the ROMs itself. Its most likely a bit of trickery to get the right time when all Flash-chips are ready to be accessed after programming.

Burst capability? Burst ROMs are mentioned in the Gossamer_HW_ERS_0.1_19961007.pdf document.

Pin 15 of the 74LVT244 is an input and is connected to pin 5 when OE2 is low. pin 5 is MEMDAT(33).

These are bits of the 16-bit Gossamer system register at 0xFF000004. The bits are defined in machinegossamer.cpp in DingusPPC.

I suppose the 32-bits at 0xFF000000 would have MEMDAT(0-31).
0xFF000004 is MEMDAT(32-39)
0xFF000005 is MEMDAT(40-47)
0xFF000006..0xFF000007 is MEMDAT(48-63)

// Bit definitions for the Gossamer system register at 0xFF000004
enum : uint16_t {
    // GRC/MFM_L            = 15,
        FDC_TYPE_SWIM3      = (1 << 15),    // Macintosh style floppy disk controller
        FDC_TYPE_MFDC       = (0 << 15),    // PC style floppy disk controller
    // /BurstCAP            = 14,
        BURST_ROM_FALSE     = (1 << 14),    // burst ROM not present
        BURST_ROM_TRUE      = (0 << 14),    // burst ROM present
    // PCI1PrsntC2_I        = 13,
    // PCI1PrsntC1_I        = 12,
        PCI_C_PRSNT_POS     = 12,           // PRSNT bits for the PCI Slot C
    // PCI1PrsntB2_I        = 11
    // PCI1PrsntB1_I        = 10
        PCI_B_PRSNT_POS     = 10,           // PRSNT bits for the PCI Slot B
    // PCI1PrsntA2_I        = 9,
    // PCI1PrsntA1_I        = 8,
        PCI_A_PRSNT_POS     = 8,            // PRSNT bits for the PCI Slot A
    // PID0                 = 7,
    // PID1                 = 6,
    // PID2                 = 5,
        PCM_PID_POS         = 5,            // Processor und Cache module ID
        PCM_PID_MASK        = 0xE0,
    // /AIO_DETECT          = 4,
        AIO_PRSNT_FALSE     = (1 << 4),     // Whisper/Wings style card in the PERCH slot
        AIO_PRSNT_TRUE      = (0 << 4),     // All-in-one style card in the PERCH slot
    // BusSpeed2            = 3,
    // BusSpeed1            = 2,
    // BusSpeed0            = 1,
        BUS_SPEED_POS       = 1,            // bus speed code, see below
        BUS_SPEED_MASK      = 0x0E,
    // /BOSE_DETECT         = 0
        BOSE_PRSNT_FALSE    = (1 << 0),     // Bose Module Detect on the Wings card
        BOSE_PRSNT_TRUE     = (0 << 0),
};