I boot and run the Quadra/LC 630 in MAME by treating PrimeTime II as a slightly different IOSB. The differences are mostly centered around the ATA controller being added and that changes how interrupts work a bit.
The SCSI thing is this: on reads, Apple does an unrolled loop of MOVE.L from the 539x. Each MOVE.L requires the hardware to gather two 16-bit words from the 539x. If the 539x de-asserts /DRQ at any time, the 68040 is kept waiting (by not asserting /DTACK) until all 32 bits are available. Same situation on writes: it firehose-blasts the 539x 32 bits at a time, and when that fills the 539x's 16 byte FIFO, the 539x de-asserts /DRQ and IOSB/PrimeTime therefore withholds /DTACK until the FIFO can accept at least another 16 bits.
This is fun in emulation because most emulators run CPU instructions as indivisible atomic operations: a MOVE.L (A0), (A1)+ will transfer the word and increment A1 by 4 and you can't stop it. (Some CPUs in MAME, notably the 6502 and Z80 families, *are* cycle-by-cycle interruptible). The operation of IOSB and its clones means you have to either be able to stop and resume the instruction in the middle or you can do what I did and have the CPU save off the registers before every instruction. If it gets a signal that the read can't complete, it'll write a meaningless temporary value, increment A1 by 4, and then immediately back up the program counter and A1 to their previous values and try the instruction again until IOSB/PrimeTime don't pull the "no data available" alarm or the CPU runs out of cycles for that frame. (In reality we actually suspend the 68k entirely until data arrives (read) or the FIFO drains down (writes) to avoid wasting host CPU time).
Just using DMA the way you're supposed to as the Quadra AVs and all other PowerMacs do is so much more civilized.
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