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Wombat (650, 800) board overclocking limitations


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I had some questions about oscillator swapping (overclocking) the Centris 650 (modified gestalt ID via on-board resistor), Quadra 650 and Quadra 800 boards. Namely some questions regarding the 'limiting factors' mentioned.

So according to Marc on the archived clock chipping page:
When you run these machines around 40 MHz, video problems seem to be the limiting factor.
And then on the current Output Enablers chart of upgrades:
Quadra 650 | 44 Mhz ---- Quadra 800 | 42 Mhz

I've thought about emailing Marc directly to ask these questions, but figured I'd ask here first to see if anyone has attempted this and how they got on.

Firstly, has anyone run their Wombat-based Mac at or above 44 Mhz? Or were there any sort of system instabilities they ran into which forced settle on 42 or 40 MHz?

Secondly, were these overclocks done with the stock CPU—be it 25 or 33 Mhz? Or were they done with a late-mask, fully-qualified MC68040, be it 25, 33, or 40 Mhz?

I'm curious if the limiting factors are indeed board/component-related, or if there were problems with the original overclocks when attempted on the XC, un-qualified silicon present in 040 Macs at the time. I've heard whispers of the new-make Turbo040/Carrera 040 upgrades able to run at 50 Mhz with proper silicon, but I think those posts were wiped out. I could be wrong. Interesting to note that the 840av—though a different board—can go to 48 Mhz. I would definitely be attempting this with my later-mask 40 Mhz CPUs.

I mean, I'm sure it's diminishing returns after a certain point, but I'm curious all the same.


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I have several Centris/Quadra 650 boards, with varieties of 68040 and 68LC040, with 25mhz and 33mhz processors. I’ve examined both speed varieties closely and I’ve never determined a difference between the boards that tells the system whether it’s one or the other.

I have yet to swap oscillators to run a 25mhz at 33mhz. On this particular set of models, I’ve often wondered how the OS obtains the gestalt ID to identify the particular model the board is in (the Centris board identifies as Centris and the Quadra board identifies as Quadra).

On the LC475/Quadra 605, Apple had a jumper to flip gestalt IDs. And running those at different speeds reported a different gestalt ID combination. 20/25/33mhz are possible, so effectively it seems 6 gestalt ID combinations are possible.

How would this be determined in the 650/800 board and how would you set it manually ?


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How would this be determined in the 650/800 board and how would you set it manually ?
In that first link: http://www.applefool.com/clockchipping/wombat.html

There are several other gestalt IDs that were, I assume, planned, but never used. but depending on which resistor is set, as well as the two pins on the 5-pin J25, used on the Q800 for an LED (the 650's LED actually being visible in the DT case)
So, a Quadra 800, is basically a Quadra 650 with the 5-pin J25 populated, as it jumpers two pins unused by the LED... The Centris 650 is a Quadra 650 with one resistor out of place, limiting its max speed. Move that, and you've got a Quadra.

Originally, there was a tutorial to modify the serial ports, to allow a speed boost to work with a Centris 650's gestalt ID, but they later discovered that there was effectively no difference in board components, aside from those resistor and LED positions/populations. The Centris' limitations were, I suppose engineered that way to make producing ONE instead of THREE discrete board designs: less expensive (with one design), and they could simply move things around to change both gestalt IDs as well as a speed limit.
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Mr. Ksoft

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I have wondered where these "limits" came from as well, because my Quadra 800 has been running happily at 44mhz for 7 years now. This is being done with a MacClip Jr variable speed oscillator. I am using the 33mhz 68040 that was in the system when I got it (assuming it's the one from the factory) but have attached a heatsink with fan that came with the MacClip. Here is a screenshot from a few years ago with some results from Speedometer:


During this time I have used it extensively and have not seen any issues that I can attribute to the overclock (just the usual MacOS instability ;)). Onboard video works completely fine. Serial ports are also fine; I have used this machine as a LocalTalk bridge over serial and have done MIDI work with a Roland SC-55 hooked directly to the serial port. I also have a second video card installed and a Stage II Rocket (cause why not).

I don't know if I have some kind of magic Quadra or something, but this machine seems to defy the laws of nature based on what's been written online up to this point. Not exactly interested in trying to push it any higher (also not sure on what settings the MacClip supports -- I admit that I ended up at 44mhz by accident when following the manual's 40mhz setting!). However I would be very interested to see if the machine would continue to be stable at 44mhz with a PDS cache card-- if it worked that would likely have more benefit than squeezing out another 2-4mhz. That is likely to remain a mystery though -- they're just too rare and expensive.


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my Quadra 800 has been running happily at 44mhz for 7 years now. This is being done with a MacClip Jr variable speed oscillator.
have not seen any issues that I can attribute to the overclock
Well that's encouraging! Thanks for sharing your findings. Good to know that up to that threshold there doesn't appear to be any hardware hiccups. Part of me is reasonably (over)confident enough to snag a 22.x and a 25.000 MHz crystal, in addition to a 20, just for kicks.

I also went ahead and emailed Marc, because I'm impatient : P so perhaps he can contribute more to the discussion.

Part of me also wishes there was a PLCC-like socket to match the 4SOJ 5.xxmm pitch of the crystals/oscillators, to make swapping a bit easier, or like you have, a variable frequency device.

very interested to see if the machine would continue to be stable at 44mhz with a PDS cache card
I was just re-reading Bolle's new trading post thread and something clicked in my brain about what he'd mentioned earlier:

The oscillator is socketed so you can swap it easily in case you want to set a lower (or higher when you're not using the cache card)
Also for bragging rights:
View attachment 31426
No external cache though at that speed, so you're still slower than a 40MHz 040 with 128k external cache.
So it turns out that, perhaps, a cache is really what makes all the difference here... albeit at a more 'humble' 40 MHz :LOL:

There was another thread (which was likely obliviated) with talk about reproducing a PDS cache card, but the connectors alone (once we actually found what the P/N was) were something like ~$30 USD a piece... coming from only one manufacturer in Japan. I'm amazed that it's still available, tbh. Who knows if that will gain traction again. If I had an ounce of skill in the PCB design dept., I would gladly take it up. I think at present I'd just fry my already overworked brain : P


I've been running my Centris 650 at 44 MHz for 8 months or so with no issues; actually I'm a little unhappy it wouldn't run at 50 Mhz. I started with a NewerTech MacClip Junior, but didn't like how flimsy it seemed, so I soldered a socket on top of the original oscillator. The stock XC68040HRC25M would hit 33 MHz with no issues, but I replaced it with a MC68040RC40A (E42K) and did the resistor swap to go higher.

My baseless suspicion is that the Quadra 650 used compatible but slightly higher quality/finer tolerance components that could maybe let it overclock further than the Centris 650.

It's a little hard to see the details, but here's a pic of the socket with oscillator.



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Centris 650 at 44 MHz for 8 months or so with no issues; actually I'm a little unhappy it wouldn't run at 50 Mhz.
Ah. This is the board I'm starting with. Interesting. I'm actually going to use that E42K mask version 68040RC40 CPU, so that's also good to know. Also, neat socket. Is that a custom creation or is there a p/n for it?

I want to say that the on-board RAM was slower on my Centris board vs my Quadra 650... something like 80ns in the Centris, the Quadra is like 70ns, and I think pics of the 800 I've seen show 60ns, but I'll have to double check. So if that's true I wonder if RAM timings could be the limiting factor... Barring any other differences.

Based on those old collections of overclocking tests, they mentioned the boards were basically identical, but there very well could be, like you said, lower quality, wider tolerance components among them.

Also, I failed to recognize the other plus from Mr K Soft's post in that NuBus worked fine as well; another good sign.


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pics of the 800 I've seen show 60ns
Yes, I looked again this morning and 60ns is what I'm seeing for the 800.

I'll have to open up my Q650, since none of the photos I've seen are clear or have the right lighting to make the screen-printing legible. The Centris, though, definitely has 80ns on-board RAM. Some *ahem* 'info' sites have the Quadra 650 as 80ns as well, but I'm one of those pedants who just wants the actual number : P


My C650 has 70ns onboard chips. The socket is a pretty ordinary one plus some bits of wire.


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I have a bunch of 1M X 4 DRAM chips in the attic. Unfortunately, I did not note down the speed. If they're 60ns they might be useful to replace the slower MB RAM with. By a bunch, I mean 324 according to my notes.

Looks like I'm gonna have to make a trip up there for some Flash chips some time in the next soon time.


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By a bunch, I mean 324 according to my notes.
That is quite a bit of them! Well hey, if they're 60ns and you're offering, I'd buy 16 for this board of mine. Maybe 32 for both, if I'm feeling brave...

I've been practicing removing and resoldering QPFs and SOJs, so mildly confident with replacing board RAM. Especially since I got some polyimide tape—though it's not brand-name Kapton... I'll definitely do a heat test first.

Working logic boards is psychologically different than practice on controller boards from dead SCSI HDDs : P


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I do question whether faster RAM will affect performance.

1) Does the memory controller change the timing of the DRAM if the system clock is changed? Speed it up as CPU speeds up. Seems unlikely.
2) On the other hand, if the memory controller is allowing a certain number of clock cycles for the DRAM to respond and you shorten those clock cycles by speeding up the board, then faster RAM might matter.
3) Is the clock the memory controller uses the same as or related to the CPU clock?


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@trag I'm a bit out of my depth here, but I'll plow forward : P

According to the DevNote on the Centris/Quadra 610, 650, 800 they share this same VLSI chip: MEMC
The MEMC IC is a very large-scale IC that combines functions performed by several ICs in previous Macintosh designs. •••••• …built-in video hardware with dedicated VRAM frame buffers controlled by the MEMC custom IC. The ROM software includes a new video driver to support the new hardware.
I'm guessing the key point will be to see how this chip operates on the bus: would that be in a breakdown of the chip itself, or are there some eccentricities/features in the ROM software driving the MEMC IC that would need to be sussed out? or am I barking up the wrong tree altogether?

Block diagram from the DevNote:


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I'm guessing the key point will be to see how this chip operates on the bus: would that be in a breakdown of the chip itself, or are there some eccentricities/features in the ROM software driving the MEMC IC that would need to be sussed out? or am I barking up the wrong tree altogether?

It could be either one. Without Apple's datasheet on the MEMC IC, we can't tell without a lot of experimentation.

There could be registers in the chip set by the ROM (or machine ID) which affect memory timing.

It could run off the system clock. It could have other clock inputs. It could internally generate clocks, although that last one is less likely.

It would be fairly straight-forward, though tedious to identify the oscillators on the board and see if MEMC IC takes input from any of them besides the system clock.

The other stuff, I don't know.


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Well, some more steps in the right direction?

I looked at a pic of the board again, and it's screen printed as 'DJMEMC' which ave me a few more results (that weren't just links to Acorn 'MEMC' and A400 repair manuals).

There's also a bbraun memory fix to use 128 MB modules (!) relative to the DJMEMC, but I don't know if that's strictly speaking relevant here.
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Again, my brain is too fatigued to really make much sense beyond what I see, but this is also an interesting little tidbit:

More from that repository


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So, my bleary-eyed interpretation of this library file is that there's essentially toggles for each iteration of the universal ROM machines, be they WLCD (610) or Wombat (650/800):
Useful VIA1 PortA bits to read: PA6, PA4, PA2, PA1 ($56)
PA6 = Lego (1), or Frigidaire (0) plastics for Wombat
PA4, PA2 = CPU Speed. 0=20MHz, 1=25MHz, 2=33MHz, 3=40MHz
PA1 = WLCD (0) or NOT! [Reserved] (1)
; djMEMC Configuration register initialization values for different CPU speeds
; [ See the djMEMC ERS for a full description of the Configuration Register ]
; djMEMC Configuration Register initialization values
@dj20Config dc.w %0000000100000001 ; fastwr=1, ROMspeed=1
@dj25Config dc.w %0000000000011010 ; drpchg=1, drpw=1, ROMspeed=2
@dj33Config dc.w %0000000010100011 ; mhz33=1, cyc23ta=1, ROMspeed=3
@dj40Config c.w %0000001011110100 ; dwcpw=1, mhz33=1, drcpw=1, cyc2ta=1, drpchg=1, ROMspeed=4
I also love the 'Smurf' references for testing the PowerPC's 68k emulation (at least that's what I *think* it is) I mean, it was around this time, and Davidian was the author of this library!

Also, the machine table
@MachineTbl ; Type CPU VIA ID
dc.b @DJ_ORIG,%00010010 ; 33MHz Frigidaire package (Quadra 800)
dc.b @DJ_BUMP,%00010110 ; 40MHz Frigidaire package (unreleased)
dc.b @DJ_ORIG,%01000000 ; 20MHz WLCD (Centris 610)
dc.b @DJ_BUMP,%01000100 ; 25MHz WLCD (Quadra 610)
dc.b @DJ_BUMP,%01010000 ; 33MHz WLCD (unreleased)
dc.b @DJ_ORIG,%01000110 ; 25MHz Lego package (Centris 650)
dc.b @DJ_BUMP,%01010010 ; 33MHz Lego package (Quadra 650)
dc.b @DJ_BUMP,%01010110 ; 40MHz Lego package (Quadra 650 SpeedBump, unreleased)
dc.b @DJ_ORIG,0 ; if here, this is EndOfTable
; VIA CPUID of 0 is a reserved (unused) machine.
I'm guessing there's very little wiggle room (say +4M Hz) within the 'profiles' of how the djMEMC is operating. I know that's not proper nomenclature, but IDK what it is, so that's my shorthand.

So unless you could modify the machine table (and probably much much more), it's unlikely you'll get something near enough to touch the 50 MHz ceiling I'm assuming.

If the djMEMC is 'generating clocks' as some research has called it, I wonder then if the resistor + LED Jumper table from above is how the chip gets identified (identifies the machine?) as a 'Frigidaire' or a 'Lego' Wombat board?

And then how does RAM timing fit in… are there only those entries from the table?


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So are these developer conversations regarding QEMU? There's a curious listing of some C code in that list...
 hw/m68k/Kconfig          |   1 +
 hw/m68k/q800.c           |  61 ++++----------
 hw/misc/Kconfig          |   3 +
 hw/misc/Makefile.objs    |   1 +
 hw/misc/djmemc.c         | 176 +++++++++++++++++++++++++++++++++++++++
 hw/misc/trace-events     |   4 +
 include/hw/misc/djmemc.h |  34 ++++++++

I wonder if those two djmemc files have any more detail to extract... not that I would know what to do with it.


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That's some interesting stuff. Is that source code that leaked out of Apple at some point?

I would like to see the updates for the Q840 and 660. That's when they added the CURIO chip which has ethernet, serial and SCSI on one chip. Might give us some insight into how that chip works. Is it one data interface for all three functions, or does every chip (85C30, 53C96 and DP83????) have its own pinouts on the chip.

I probably make less of it than you do. I can code but when the code starts getting spread out across files and needs something like Make to bring it all together, I start getting lost.


I'm now very curious what my C650 gets detected as and what values it picks for these various registers. Sometime soon I'll try to write a little program to read them out (like what the VIA reports, what timings it chooses, etc.). Maybe a modified ROM could be made to get more overclocking headroom if there's timings that can be tweaked.