SCSI to IDE, z-80 conv:Prototype, looking for a project lead

[techknight]

Newer versions use the 75LVD chip for the SCSI transceivers. I built that guys version into a smaller form factor, but as i said previously it failed. The hardware is proven working in his environment so the only explanation is my board layout wasnt up to par.

I may take a look at this project, but I dont really see any code, has any been developed? is it working? not working? etc...

But i may stick with Micha's idea and just layout a new board being 4 layer. Best way I know to do that....

Or since ive better familiarized with eagle, may just open his existing project file in eagle and rework the board for CF.

 

[dougg3]

I tell you, every time I see those videos of people deftly dropping an SMT chip on glistening solder pads and instantly forming a perfect bond it reminds me of tasks like juggling or making a pizza crust by spinning and tossing it in the air. Someone who's good at it can make it look so easy, but when you try it yourself... balls flying everywhere, pizza dough on the ceiling, dogs and cats living together, mass hysteria, etc, etc.

LOL, I know what you mean. I used to feel the exact same way until I tried it--it's really not too bad. What makes it all work is the flux, especially if you add more of it. Once you get the hang of it, everything just kind of flows into place on its own. it's way more convenient to do SMT chips than soldering a ton of through hole pins.

 

[James1095]

Are you sure your board layout is the reason that it failed? Board layout can be critical, but more than once I've been pulling my hair out trying to get something working only to realize I've set one or more of the fusebits wrong in the AVR or plugged something in backwards. Depending on what it's doing, you may be able to tweak things a bit to get a less than perfect PCB layout working. A bypass capacitor tacked on in strategic locations can work wonders. Are you sure you used the correct 74xx parts for the buffer logic? The the letters in the middle, LS, S, ALS, HC, etc matter in many cases.

 

[Gorgonops]

I built that guys version into a smaller form factor, but as i said previously it failed. The hardware is proven working in his environment so the only explanation is my board layout wasnt up to par.

I guess hadn't realized that the thing I linked to was the source of the project you'd been working on. (I didn't chase down the old thread.) If I had oodles of time (which I don't) and the appropriate legacy hardware to fiddle with it would be totally fun to try poking at something like this myself; I'm still sort of wondering if it might be possible to compress a working model down to one AVR instead of two. (Doing so would probably come at a significant performance loss, but elderly Macs don't push SCSI particularly hard in the first place.)

I'm saying this completely from ignorance, of course, but looking at the schematic/hardware doc .pdf it appears that the AVR connected to the SCSI PHY is completely dedicated to "low-level bitbanging" the port, doing some simple protocol checks (parity checking?), and communicating "sanitized" data/control words with the "target" AVR over a dedicated high-speed serial bus with control signals. (Which I gather is sort of a communications standard for AVR chips?) I can't help but wonder if you used a single AVR with sufficient SRAM (looks like they're available with up to 8k, vs. the 1k and 4k used here?) if you could timeslice between running the PHY and driving an SD card with the I/O pins you'd otherwise use for inter-AVR communication. I know there can sometimes be significant (and unpredictable) latency when dealing with SD cards, but assuming a Mac has reasonably low expectations and does transfers on a per-sector basis maybe it would be tolerable. "BigMessOWires" talked at length about how the latency of SD cards caused issues with emulating the spinning-disk mechanicals of a floppy drive on his Mac floppy emulator, but SCSI is a higher-level protocol that doesn't have the same constraints. Some of those early SCSI drives (like the ones that were actually an MFM/RLL drive with a converter board) undoubtedly had their own problems with unpredictable latency.

Anyway, blawblawblaw. I don't know snot about AVR programming so don't mind me. I haven't looked at what's actually required from a SCSI PHY, either, so if it has to "automatically" change the state of pins by itself while the "target" CPU is digesting a command it might be an incredibly difficult job to do that "time slicing". It looks like AVRs have the capacity to throw interrupts on pin changes, but I could totally see a problem with "drowning" a single core with interrupt traffic, particularly if there are other devices sharing the SCSI bus.

(Hey, you could use a Propeller! Eight seperate cores!... and probably not enough I/O pins and a few other problems. Never mind.)

 

[techknight]

Well I am pretty advanced with AVRs, I write alot of weird stuff with AVRs. I have written LED sign controllers, desktop consoles/keypads, Scoreboards, Other various display controllers. Input controllers, Even an MP3 player with IDE support. Then some random systems and control stuff like an Ice machine control board I used an AVR on.

But the problem is, AVR is pretty capped at 20mhz. Some might go higher, but the I/O is limited. That begs the question, Why not use another CPU? why the AVR? Well at the time I was getting into microcontrollers, I had AVRs at hand, and a shitload of them at my fingertips. So I got into programming on the AVR. ASM at first, then BASIC but not C. I should have taken C classes in school but didnt, took basic instead. whoops. Well BASIC will compile on AVR so that works for me. So from that point, I sorta stuck with AVR and became a big AVR fanboy.

Now of course, theres the PIC line too. Which have much higher clock speeds, But they dont have the 1 cycle execution time the AVR has. Maybe newer chips do, I dont know, but PIC is still a choice as they make BASIC compilers for PIC as well.

But with that aside, for these applications, I/O is a big thing.

Propeller would be nice, you can taskroute individual interrupts/subroutines to each core. But the I/O is limited.

HOWEVER.... Something along the lines of a 5V CPLD as an I/O expander would probably be ok. Maybe a dedicated 8-bit parallel bus between the prop and the CPLD, or tie every single available I/O pin on the prop to the CPLD. Who knows. CPLD could provide dual functions. I/O expander and address decoding. You wouldnt need anything as crazy as a FPGA. a Simple CPLD would probably do.

Anyway, Micha's code which my hardware was based on, the 2 AVRs are interconnected via 8-bit parallel bus with some flow control lines, INT/BSY.

James: I tried that, time and time again. I think its the layout as I didnt route the VCC/GND lines sufficiently enough, decoupling caps too far apart. and the CPUs have thier own crystals, 16mhz. Timing should be irrelevent because of the async 8-bit handshake bus. But thats where things fail. The CF card socket didnt pick up the card correctly either, but I havent even gotten to that point yet as I wanted to iron out the bugs.

Also another point to be said, Michas code/design works, is proven. So it has to be me. However in his setup he was using the AHA2940 with linux. I tried AHA2940 and it choked up. So i know its me. If i force parity check off, (fails parity). it will pick up and show the device ID and medium info! but just after the bus release, one of the AVR dies out, wont respond anymore. has to be hard cycled.

But the gadget makes a pretty SCSI activity light though. On a powerbook back when I was debugging it, I set it to the same SCSI ID as the HDD internal. Once the Target sees an ID conflict, it kills itself to avoid it. But the busy LED driven by the SCSI side AVR, still blinks when the HDD is working. lol. so technically the PIA AVR could be a fancy smancy LED activity indicator. lol.

 

[James1095]

James: I tried that, time and time again. I think its the layout as I didnt route the VCC/GND lines sufficiently enough, decoupling caps too far apart. and the CPUs have thier own crystals, 16mhz. Timing should be irrelevent because of the async 8-bit handshake bus. But thats where things fail. The CF card socket didnt pick up the card correctly either, but I havent even gotten to that point yet as I wanted to iron out the bugs.

There are some tricks you can try to fix that. It won't be pretty, but it will serve as a proof of concept. Solder some decoupling caps directly across the power pins of each IC. Add additional Vcc/Gnd wires tack soldered from the power and ground input pins to each IC. If you suspect a particular trace is routed too close to something else, cut it at each end and replace it with a piece of wire routed differently. If it works, then it proves that the layout is the only problem. It sounds like you're 90% of the way there, the problems that remain are probably something simple.

 

[Bunsen]

In re the shortage of GPIO pins on micros:

Use a micro with inbuilt USB host/USB OTG, and a USB to IDE or CF board (scavenged from a card reader, say). Or skip IDE altogether and use a USB stick.

Now you just need one with that ... and enough pins to bitbang the SCSI side.

 

[Bunsen]

Hmm. Still on the IO pin shortage - is dual-ported RAM a possibility? (with parallel IO on one side and serial on the other) I know people use them for A to D and D to A conversion. Or a bunch of mux/demux ICs?

 

[techknight]

The parity problem I think is because I use a 74 series parity generator, that he used. But i located it clear across the other side of the PCB, with its traces to the transceivers routed around all the other traces, from top to bottom multiple Vias. So, i may have to do a direct connect there.

I should have meandered the traces to make sure all the signals would reach the parity generator at the same time. Oh well.

 

[uniserver]

Sounds good you can count on me for some fund raising, I don't have much these days but I will get some together for you!

I will post this in the thread!

Thanks,

Charles

On Nov 27, 2012, at 7:34 PM, Andrew Lynch wrote:

Hi Charles

Thanks! Actually just keeping the topic alive at 68kmla would be of help in case there is someone there who can and would be able to help us complete the board. This has been an ongoing concern for a couple of years now so I am always looking to boost the team with additional talent. We’ve got great builders on board already but we can always use another set of eyes to help move it along.

Also once this build and test phase is complete I suspect we’ll need another round of prototype boards to incorporate the fixes so far like the termination resistors and a “write prevent” jumper/pull up resistor on the Flash ROM. I think there was another fix that Douglas or someone else found a while back. In any event, there will probably be some minor fund raising for the new boards so some visibility 68kmla, CCTALK, and vintage-computer.com forums would be helpful as well.

I appreciate your interest so far. Thanks and have a happy holidays!

Andrew Lynch

Sent: Tuesday, November 27, 2012 10:46 AM

To: Andrew Lynch

Cc: mouse@netbsd.org; 'RobJ'; jwsmail@jwsss.com; douglas_goodall@mac.com

Subject: Re: SCSI to IDE/SD bridge board project

my personal expertise pretty much ends at assembling a pcb, that I can do.

as far as firmware, I would be pretty much useless, unless someone is motivated enough

to teach me a few things. That would probably detract from the current progress on this project.

In my opinion, it seems like its most of the way there, just needs a little more effort by the right people

and you will have a board that we can all appreciate and seriously use!

Charles

On Nov 24, 2012, at 1:23 PM, Andrew Lynch wrote:

Hi Mouse! If you'd like some help just send an email "reply all" so we can

help share the experiences.

There are many sources for the PLCC-44 sockets and Z80 CPU. Here is Jameco,

Digikey, and Futurlec links but are probably also available locally or

through any other electronic supply house.

PLCC-44 sockets

http://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_71618_-1'>http://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_71618_-1

http://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_71618_-1

http://www.digikey.com/product-detail/en/A-CCS44-Z-R/AE10057-ND/821811

http://www.digikey.com/product-detail/en/8444-11B1-RK-TP/3M4411B1-ND/1026473

http://www.futurlec.com/Sockets/PLCCS44.shtml

Z80 CPU

http://www.jameco.com/webapp/wcs/stores/servlet/Product_10001_10001_35705_-1

http://www.digikey.com/product-detail/en/Z84C0008PEG/269-3895-ND/929205

http://www.futurlec.com/ICZ80Series.shtml

Thanks and have a happy holidays!

Andrew Lynch

-----Original Message-----

From: mouse@netbsd.org [mailto:mouse@netbsd.org]

Sent: Saturday, November 24, 2012 11:53 AM

To: Andrew Lynch; RobJ; jwsmail@jwsss.com; douglas_goodall@mac.com;

Subject: Re: SCSI to IDE/SD bridge board project

If there are builders there who would like to work on the SCSI to

IDE/SD bridge project please have them contact me. A suitable builder

would be experienced with electronics project build and test, writing

SCSI and IDE firmware, etc. There are several builders working on the

project already so it won't be like starting from scratch.

One thing Andrew doesn't mention is that an expertise in sourcing parts is

also important. (That's where I'm blocked - I'm having trouble finding

things

like the PGA socket for the SCSI chip, or for that matter a Z80, as

opposed to

any of numerous extended-in-various-ways

Z80 variants.)

/~\ The ASCII Mouse

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X Against HTML mouse@rodents-montreal.org

/ \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B

 

[olePigeon]

What things are you having trouble finding? If you have a list of ICs, connectors, and what not, I can check my local parts stores. I have 2 or 3 here in my immediate area with all sorts of bits and bobs. I'm not technically minded, but I wouldn't mind helping by sourcing parts.

 

[uniserver]

Subject: Re: SCSI to IDE/SD bridge board project

Date: December 4, 2012 11:21:32 PM EST

To: RobJ , jwsmail@jwsss.com, douglas_goodall@mac.com, Andrew Lynch

|| There are many sources for the PLCC-44 sockets and Z80 CPU.

I was sure there would be; I was just having trouble finding them - and

being reasonably sure what I'd found was the right thing.

|| Here is Jameco, Digikey, and Futurlec links but are probably also

|| available locally or through any other electronic supply house.

Thank you! The Web URLs themselves are of little use (Jameco and

Digikey, in particular, have improved their websites to the point where

they refuse to work at all for me; Futurlec may work, even though

they're in the US - I need to investigate further), but the part

numbers embedded within some of them are very helpful.

|my personal expertise pretty much ends at assembling a pcb, that I

|can do. as far as firmware, I would be pretty much useless, unless

|someone is motivated enough to teach me a few things. That would

|probably detract from the current progress on this project.

Well, speaking personally, the project is not "get this piece of

electronics working as soon as possible, everything else can fall by

the wayside". I consider things like helping you people to the extent

that I can and you want to to be a perfectly fine part of it.

/~\ The ASCII Mouse

\ / Ribbon Campaign

X Against HTML mouse@rodents-montreal.org

/ \ Email! 7D C8 61 52 5D E7 2D 39 4E F1 31 3E E8 B3 27 4B

 

[uniserver]

I’m very aware of the board capabilities and that is using sudo-DMA. I have the Z53C80 working on my Heathkit system (picture attached) using the sudo-DMA capability but it is running under the 8051 core.

On 1/6/13 4:12 PM, "alan@alanlee.org" wrote:

Few clarifications:

1) There is no termination - passive or active - on the current board design. You will need to use external termination resistor packs at the ends of the chain.

2) The Z53C80 is essentially just a PHY. It has no intelligence beyond a simple DMA initiator and counter to allow a bus master to sequentially clock out/in a series of data bytes to/from the bus. Beyond that it presents just a simple register interface to allow cycle status to be read and set and generate an interrupt on change.

3) The DMA feature is not connected as there is no DMA engine on the current board.

Bascially it's a Z80, 32K RAM, 32K ROM, UART, SCSI PHY, and bit-bangable IDE, SD card, and SCSI.

-Alan

On January 6, 2013 at 6:53 PM Norberto Collado wrote: > Hello Andrew, > > How much it will cost to get a SCSI2IDE pcb board along with the external > termination and any rework instructions? If you are planning to spin the > board, please add the termination resistors along with the termination > diode. Also add a 3 POSITION 6 PIN SLIDE DIP SWITCH to select target SCSI ID > during arbitration if possible. The target ID could be code hardwire and I > think this is the design intend. I will be interested on this new pcb board. > > Now that our Z67-IDE+ SCSI/SASI board is fully functional, I will have > "some" cycles to play with the SCSI2IDE board in target mode to enable it to > work with our Heathkit systems. Not sure what this group has accomplished so > far in FW to leverage, but the plan will be to do the following; > > 1. Enable the Serial Port for debugging > 2. Enable the 82C55 to write and read to the CF card or IDE drives via the > serial port (Pressing the "ESC" key enables the Menu). On power-on it will > scan the IDE bus and display hard drive information and slave ID. > 3. Enable the Z53C80 arbitration and to read and write to the CF card or IDE > drive > 4. Test and debug with the Heathkit systems to support SASI commands. Boot > HDOS and CP/M. > 4. Test and debug with the PC via Windows XP to support required SCSI-1 > commands. Boot Windows. > 5. Write code in assembly language. I will like to leverage on any code > already writing to support such board if possible. > > On the SD support, I will pass due to lack of experience in using it. > Perhaps next year! > > I'm not sure how the Zapple code comes into play with the SCSI2IDE board!!! > Does it allows me to download the hex file to the board via the serial port? > > Is there information on the board Memory/IO map and Interrupts? > > Also I see two 50 pin connectors, one for the SCSI-1 connection, but I'm > confused on the second 50 pin connector and its intend. > > Thanks, > > Norberto > > > > On 1/6/13 6:21 AM, "Andrew Lynch" wrote: > > > Hi Douglas! Thanks! Yes, I think adding the SCSI to IDE/SD to the existing > > N8VEM SVN tree would be a good idea. Maybe it would help elevate the > > visibility of the project a bit. > > > > We've made some real progress on this project in recent months and I would > > like to see if finally come to fruition. Every day that goes by diminishes > > the amount of real SCSI-1 drives remaining for the vintage/legacy/classic > > computers. Especially Wayne has made real progress checking out the IO > > subsystems so I am feeling good we can make this work. > > > > So far, I think the SCSI to IDE/SD needs a couple of hardware changes. > > First the U33 footprint needs to fixed (done) and optional pull-up resistors > > on the SCSI pins (next hardware version). However these are easily worked > > around with the existing prototypes. I think the key to getting over the > > rest of the issues on the board is to the Z53C80 SCSI controller. Assuming > > it is responsive and functioning writing the Z80 assembler code to use the > > SCSI controller in target mode is going to be a big job. > > > > Thanks and have a nice day! > > > > Andrew Lynch > > > > -----Original Message----- > > From: Douglas W. Goodall [mailto:douglas_goodall@mac.com] > > Sent: Tuesday, January 01, 2013 9:17 PM > > To: Andrew Lynch > > Subject: Re: lost emails on SCSI to IDE/SD converter project > > > > On 1/1/2013 5:42 PM, Andrew Lynch wrote: > >> Hi Douglas! Thanks! Rob is working on his SCSI to IDE/SD prototype > > board > >> and having some issues getting it started. > > I have been in contact with Rob on and off. > >> Does the current Zapple debug > >> monitor require either of the UART or the Z53C80 to be present in > >> order to boot? I don't think so but would like to double check. > > I have a vague recollection that having a UART is helpful if you want to > > interact with Zapple. > > > > I don't think that Zapple does anything with the SCSI chip though. > > > > Attached is the source code of the version of Zapple for the SCSI2IDE board, > > and the binary, and the doc (pdf). > > > > I think we should have an svn repository for the SCSI2IDE project, so that > > the various people working on it can post their work, both to take advantage > > of source code control, but also so we can access each other's work > > > > Files having to do with the project are in the wiki, here... > > http://n8vem-sbc.pbworks.com/w/browse/#view=ViewFolder&param=SCSI%20to%20IDE > > %2FSD%20prototypes > > > > By the way, I am happy to provide a SCSI I Terminator to any of the people > > working on the project for free. > > I just want to ask for shipping. You can announce this if you like. > > > > Thoughts? > > > > Respectfully, > > Douglas > > > > P.S. I am working with Wayne on the SCSI2IDE firmware. I just sent him a > > Micropolis SCSI I Hard Drive in a powered chassis to use as a SCSI I > > reference subsystem. I am also working on a modest operating system for the > > board. > > > > > >> It sounds like Rob's 8255 is broken although there may be an issue > >> with the PCB or some other part. I reworked the PCB and fixed a bunch > >> of problems but who knows what's still lurking in there. > >> > >> Thanks and have a Happy New Year! > >> > >> Andrew Lynch > >> > >>> -----Original Message----- > >>> From: Douglas W. Goodall [mailto:douglas_goodall@mac.com] > >>> Sent: Tuesday, January 01, 2013 6:44 PM > >>> To: Andrew Lynch > >>> Subject: Re: lost emails on SCSI to IDE/SD converter project > >>> > >>> Andrew, > >>> > >>> I have all the email traffic saved. Can you describe what your missing? > >>> > >>> I will dig it up and provide it. Assuming the emails in question came > >>> my > >> way > >>> originally. > >>> > >>> I will send a picture of the SCSI board signon asap. > >>> > >>> Douglas > >> > > > >

 

[bd1308]

I dont know how much help I can be, but I'd be glad to test it. I'm working on a couple of other hardware related projects and know my way around software well enough, and I *might* be able to help. I can solder and test for sure though

 

[uniserver]

Yes, pin 26 TERMPWR should not be connected to VCC and left open; great catch. On the other pins stated below based on the NCR documentation;

“On the single-ended signals, all odd numbered lines plus 20, 22, 24, 28, 30 and 34 are connected to ground on the controller and pin 25 is left open”.

Norberto

On 1/10/13 5:02 PM, "Alan Hightower" wrote:

I'm not sure where the last wiki update came from but it points out a problem. Pin 26 should not and cannot be a board power supply. It is termination power only. If you have a long cable with passive networks at both ends, SCSI supply is only guaranteed to provide enough power to handle peak switching loads from the pull ups. There's some margin but not enough to handle the hundreds of mV the emulator board pulls. If someone tries to power their emulator from it, they will eventually burn up the termination reg on their host controller.

Also pin 25 should be left un connected and not to ground. I've seen devices short pin 25 and 26 together. Pins 23, 24, 27, and 28 should also be open.

-Alan

Sent from my iPad

On Jan 10, 2013, at 7:26 PM, "Andrew Lynch" wrote:

Thank you very much Wayne! Your efforts have tremendously moved the S2I project forward! The wiki page is great!

All the recent interest has caused a bit of upsurge in interest in the S2I project in general. So far I have sent out three of the remaining four prototype PCBs. Hopefully this means we can continuing build and test and get some more diverse working systems out there to “shake down” the prototypes.

I really appreciate your leadership on the S2I project. This is going to benefit the wider hobbyist/vintage/classic computer community for many years to come.

Thank you!

Andrew Lynch

From: Wayne Warthen [mailto:wwarthen@gmail.com]

Sent: Thursday, January 10, 2013 1:03 AM

To: Andrew Lynch

Cc: Norberto Collado; Douglas Goodall; mouse@netbsd.org; Charles Phillips; jwsmail@jwsss.com; Alan Hightower; leonb@swiftdsl.com.au; nestor ruiz; Clem Maloney; Geoffrey Reed; Matthew Hudson; Ryan Wallmow; cotsco@frontiernet.net; Miro Svetlik; ..I'd rather be coding ASM!; Bob Devries; Marc Holz; Mark H. James; Mark Martin; RobJ; Bob Grieb

Subject: Re: lost emails on SCSI to IDE/SD converter project

Hi Folks,

I have posted a couple things to the Wiki tonight.

The file http://n8vem-sbc.pbworks.com/w/page/62549548/S2I%20Status is a document describing the status of the S2I Firmware Project. It includes how to build and use the firmware. It needs a lot more work, but should get folks going.

More importantly, the file http://n8vem-sbc.pbworks.com/w/file/62549540/S2I%20Firmware.zip is an archive with the firmware source and full build environment along with the current firmware build.

Everything is still really rough, but the rate of progress on this seems to be increasing. The firmware is definitely now monitoring the SCSI bus and appears to be accurately following bus signals. In theory, I am only a few hours away from adding enough code to prove that a SCSI command/response can be completed. See below for a sample of a test run of the firmware.

Contributions of any kind are welcome!

Thanks,

Wayne

 

[uniserver]

*** hey guys, if you have any spare cash to throw toward this project, the main man is in need, anything will help at this point.

----->

Hi Charles! I think we are getting close to a S2I demonstration in the near future. I would like to respin the prototype board with all the fixes so far and get another small batch of 10 for the builders. There have been many improvements such as optional termination, fixed SCSI connection, new option jumpers, better layout, etc.

Would you be able to do some fund raising on 68KMLA? A bunch of $5 and $10 donations would go a long way. As a rough estimate I’ll need about $200 for 10 new PCBs. It normally takes about three weeks from time of delivery. I would prefer to provide the boards to the builders for free since it is using their time to build and test. Otherwise I’ll provide the PCBs as normal N8VEM boards ($20 each) to cover expenses.

I think these PCBs are going to be close to if not fully production representative. Hopefully they will be very helpful for those vintage 68K Macs, Amiga 1000’s, Atari ST’s, ancient DEC’s, etc who depend on SCSI-1 drives. You can gather the funds or just have them send to me at LYNCHAJ@YAHOO.COM (PayPal) with “S2I prototype boards fund” in the subject line.

Any and all help greatly appreciated. Thanks and have a nice day!

Andrew Lynch

 

[uniserver]

**** read above post **** This project Needs some cash to move this project forward,

(Its finally aggressively moving along)

(I just sent the most I could humanly come up with because I feel the priority of this project is very high)

To: LYNCHAJ@YAHOO.COM

Amount: $50.00 USD

Sent on: January 14, 2013

Subject line of your payment email: S2I prototype boards fund

Message in your payment email: I sent you about the most I (personally) can scrounge up this month, thanks sir hope it helps. This project is really top priority! I can't think of any single project that has more real world use then this.

 

[uniserver]

** read above posts if you can donate, please do. **

-------- Original Message --------

Subject: RE: lost emails on SCSI to IDE/SD converter project

Date: Mon, 14 Jan 2013 21:03:42 -0500

From: "Andrew Lynch"

To: "'Ryan Wallmow'"

Cc: "'Rob Jarratt'" , "'Wayne Warthen'" , "'Norberto Collado'" , "'Douglas Goodall'" , , , , "'nestor ruiz'" , "'Clem Maloney'" , "'Geoffrey Reed'" , "'Matthew Hudson'" , , "'Miro Svetlik'" , "'..I'd rather be coding ASM!'" , "'Bob Devries'" , "'Marc Holz'" , "'Mark H. James'" , "'Mark Martin'" , "'Bob Grieb'"

Thank you Charles! I very much appreciate your efforts!

Have a nice day!

Andrew Lynch

SENT: Monday, January 14, 2013 5:07 PM

TO: Ryan Wallmow

CC: Rob Jarratt; Wayne Warthen; Andrew Lynch; Norberto Collado; Douglas

Goodall; mouse@netbsd.org; jwsmail@jwsss.com; Alan Hightower;

leonb@swiftdsl.com.au; nestor ruiz; Clem Maloney; Geoffrey Reed; Matthew

Hudson; cotsco@frontiernet.net; Miro Svetlik; ..I'd rather be coding

ASM!; Bob Devries; Marc Holz; Mark H. James; Mark Martin; Bob Grieb

SUBJECT: Re: lost emails on SCSI to IDE/SD converter project

i am trying hard to get some more donations for this project!

On Jan 14, 2013, at 5:04 PM, Ryan Wallmow wrote:

With all this talk lately, I might have to work on mine again, I left

mine with all the sockets installed, but I hadn't yet started to

purchase components due to lack of funds and time, now that things have

changed, it gives me reason to go for it again ;-)

Good work everyone!

On Mon, Jan 14, 2013 at 3:58 PM, Rob Jarratt wrote:

This sounds like great progress! I need to find my last component and

then work out how to use the programmer to get the board to do something

(and find the time to do it!)

Regards

Rob

FROM: Wayne Warthen [mailto:wwarthen@gmail.com [2]]

SENT: 14 January 2013 02:22

TO: Andrew Lynch

CC: Norberto Collado; Douglas Goodall; mouse@netbsd.org [3]; Charles

Phillips; jwsmail@jwsss.com [4]; Alan Hightower; leonb@swiftdsl.com.au

[5]; nestor ruiz; Clem Maloney; Geoffrey Reed; Matthew Hudson; Ryan

Wallmow; cotsco@frontiernet.net [6]; Miro Svetlik; ..I'd rather be

coding ASM!; Bob Devries; Marc Holz; Mark H. James; Mark Martin; RobJ;

Bob Grieb

SUBJECT: Re: lost emails on SCSI to IDE/SD converter project

More progress this weekend. Still a long way to go, but this is good

stuff. I have been able to exchange data with a host initiator to the

point where the host knows the target is there and basic information

like it's name and capacity. Here are links to some pictures I just

posted on the Wiki. I can see the host asking for a "READ DATA" command

now, but have not had time to implement it, but very close.

LUN Discovery.jpg shows my test harness (Sergey's Xi8088 running a

Future Domain SCSI Controller). Notice that the SCSI device has been

detected and identified!

By the way, I am desperately seeking a good SCSI-1 reference...

Thanks,

Wayne

 

[Gorgonops]

Just out of curiosity: Did all those people agree to you pasting their email addresses in plain text onto an Internet forum?

 

[uniserver]

Even $5 bucks would help, this project is hot.

Need to get on it, while the Firmware/Hardware guys are motivated.

LYNCHAJ@YAHOO.COM (PayPal) with “S2I prototype boards fund” in the subject line.