Kai Robinson
Well-known member
OK - back to what's going on - I'm reading the guide to macintosh hardware and i've come across this:
When power is first applied to the Macintosh SE computer, the following sequence of
events takes place:
1. The Sony sound IC monitors the voltage levels on the board and asserts the /RESET
signal until 0.25 second after the voltage has stabilized.
2. The /RESET signal causes the CPU, the BBU, and all of the internal devices to come to a
known initial state.
3. The Sony sound IC deasserts the /RESET signal and the CPU looks at the first four
words in memory (starting at location $00 0000) to get the Reset vector. When the
BBU is reset, it starts up with the ROM overlay address map, which puts ROM at
location $00 0000. In the ROM overlay address map, an address to a location in the
range $40 0000 through $43 FFFF is also decoded by the BBU as an address to ROM.
4. The CPU goes to the memory address pointed to by the Reset vector and begins to
execute the code it finds there (the Reset handler).
5. One of the first instructions in the Reset handler is a jump to a location in the range
normally assigned to ROM ($40 0000 through $43 E800). The first time the BBU
receives an address in this range, it switches to the normal address map. In this address
map, RAM is located at $00 0000 through $3F FFFF and ROM is located at $40 0000
through $43 FFFF.
6. The Reset handler carries out the startup procedure described in Inside Macintosh
I wonder if there's a voltage issue somewhere that means the SND isn't releasing the /RESET pin...
When power is first applied to the Macintosh SE computer, the following sequence of
events takes place:
1. The Sony sound IC monitors the voltage levels on the board and asserts the /RESET
signal until 0.25 second after the voltage has stabilized.
2. The /RESET signal causes the CPU, the BBU, and all of the internal devices to come to a
known initial state.
3. The Sony sound IC deasserts the /RESET signal and the CPU looks at the first four
words in memory (starting at location $00 0000) to get the Reset vector. When the
BBU is reset, it starts up with the ROM overlay address map, which puts ROM at
location $00 0000. In the ROM overlay address map, an address to a location in the
range $40 0000 through $43 FFFF is also decoded by the BBU as an address to ROM.
4. The CPU goes to the memory address pointed to by the Reset vector and begins to
execute the code it finds there (the Reset handler).
5. One of the first instructions in the Reset handler is a jump to a location in the range
normally assigned to ROM ($40 0000 through $43 E800). The first time the BBU
receives an address in this range, it switches to the normal address map. In this address
map, RAM is located at $00 0000 through $3F FFFF and ROM is located at $40 0000
through $43 FFFF.
6. The Reset handler carries out the startup procedure described in Inside Macintosh
I wonder if there's a voltage issue somewhere that means the SND isn't releasing the /RESET pin...