Arisotura
Well-known member
I figured I might as well make a thread for this video card, as it piques my curiosity.

I did get that card a while ago, but didn't do much with it at the time. Reason was that I couldn't really get it to work with much.
I looked into it again lately. It does work with one of my monitors, which happens to support sync-on-green, except most of the time the picture is tinted green, and the monitor may have trouble aligning it properly. It doesn't work at all with my other monitor which doesn't support sync-on-green (and seems pickier about sync signals in general).
This card outputs sync on green, but it also outputs separate H/V sync signals. I found out that if I cut off these separate H/V sync signals, I reliably get a perfect picture on my SoG monitor. So I figured that what's happening is that my monitor is picking up the H/V sync instead of the green sync, but the H/V sync this card produces are weird and causing these issues.
I also have a Macintosh II color video card, and that one does work fine with both monitors (and apparently anything really). It does also output sync on green, but I guess the H/V sync it outputs do closely match the green sync so things work out.
This piques my interest, and I kinda want to see what it would take to make the Lapis card VGA-compatible. Also, the way this card is made in general does make me want to see what's possible.
The main components of the card are:
* Xilinx XC3030 and XC2018 -- FPGA chips
* Texas Instruments TLC34075 -- video interface chip with palette
* VRAM
* NuBus ROM
* support chips (bus transceivers, timing generation, etc)
The Xilinx chips don't hold any configuration data on their own, and have to be configured at startup, which is where things get interesting.
A while ago I dumped the NuBus ROM for this card. The ROM appears to contain 8 possible sets of configuration data for the Xilinx chips. Each set is 0xB00 bytes long, and they start at offset 0. Then at offset 0x6000 we get the DeclROM stuff and the initialization code for the card.
So it appears that this card has different possible modes of operation, which is interesting.
I want to figure out how the various components map to the NuBus interface next. I'll prolly post findings in this thread. If anything, I like figuring out how things work.

I did get that card a while ago, but didn't do much with it at the time. Reason was that I couldn't really get it to work with much.
I looked into it again lately. It does work with one of my monitors, which happens to support sync-on-green, except most of the time the picture is tinted green, and the monitor may have trouble aligning it properly. It doesn't work at all with my other monitor which doesn't support sync-on-green (and seems pickier about sync signals in general).
This card outputs sync on green, but it also outputs separate H/V sync signals. I found out that if I cut off these separate H/V sync signals, I reliably get a perfect picture on my SoG monitor. So I figured that what's happening is that my monitor is picking up the H/V sync instead of the green sync, but the H/V sync this card produces are weird and causing these issues.
I also have a Macintosh II color video card, and that one does work fine with both monitors (and apparently anything really). It does also output sync on green, but I guess the H/V sync it outputs do closely match the green sync so things work out.
This piques my interest, and I kinda want to see what it would take to make the Lapis card VGA-compatible. Also, the way this card is made in general does make me want to see what's possible.
The main components of the card are:
* Xilinx XC3030 and XC2018 -- FPGA chips
* Texas Instruments TLC34075 -- video interface chip with palette
* VRAM
* NuBus ROM
* support chips (bus transceivers, timing generation, etc)
The Xilinx chips don't hold any configuration data on their own, and have to be configured at startup, which is where things get interesting.
A while ago I dumped the NuBus ROM for this card. The ROM appears to contain 8 possible sets of configuration data for the Xilinx chips. Each set is 0xB00 bytes long, and they start at offset 0. Then at offset 0x6000 we get the DeclROM stuff and the initialization code for the card.
So it appears that this card has different possible modes of operation, which is interesting.
I want to figure out how the various components map to the NuBus interface next. I'll prolly post findings in this thread. If anything, I like figuring out how things work.