• Hello, Guest! Welcome back, and be sure to check out this post for more info about the recent service interruption and migration.

Breaking the 36MB RAM limit on the LCIII

max1zzz

Well-known member
Normally the LCIII is limited to 36MB of RAM - 4MB onboard and one 32MB SIMM
The simms are limited to 32MB as there are only 11 address lines hooked up to the RAM SIMM socked so larger sticks won't work (The will typically show up as 16 or 32MB)

However while creating a pin listing for the Sonora ASIC at the heart of the LCIII I noticed something interesting - there where two signals leaving the Sonora which went to two resistor packs on the underside of the board but went nowhere after that, everything else going through these resistor packs where RAM signals so maybe there where RAM signals too? Maybe they where two additional RAS signals and at some point Apple had considered designing a LCIII with two SIMM slots?

A little probing with the oscilloscope revealed a signal that to my untrained eye looked a lot like a RAS signal on both of these

There was only one thing for it, bodge a second SIMM slot in!
IMG_2100.jpg
All signals between the two SIMM slots are commend except the RAS signals for which the external slot is connected to the extra RAS signals I found on the board
The result (after one extremely long memory check) was this:
IMG_2099.jpg
52MB :)Thats 4MB onboard + 16MB in one slot and 32MB in the other

Why not 2 32MB simms? I could only find one working 32Mb simm :)
I did once get a second very flaky 32MB simm to play ball for long enough the get the LCIII to boot and report 68MB total but didn't get a picture of it....

Want to try this craziness yourself? the two extra RAS signals can be found on pin 14 of RP4 and pin 16 of RP5

It not currently very practical as there isn't exactly anywhere to put a second slot on the LCIII but I do have the idea of creating a RAM upgrade board for the LCIII that plugs into the simm socket and picks up the additional RAS signals with flying wires (Essentially cramming two RAM simms into one)

It should also in theory be possible to replace the on-board bank with 16MB giving a total possible maximum of 80MB, more than 2x what apple says is supported!
 

Trash80toHP_Mini

NIGHT STALKER
Awesome, but you might get farther I think.😜 What you've just described is what Dr. Bob disparaged as The Evil RAS Line Hack done to a Q605/LC475 board over on 'fritter in the Snitz era.

Do a replacement board with only two SIMMs, no onboard memory and check to see if there's a bank select mechanism. ;)
 

max1zzz

Well-known member
Would it be possible to combine this knowledge with the reverse-engineered LCIII boards, to create a board with dual SIMM slots?
Do a replacement board with only two SIMMs
This has been a surprisingly popular request, the short answer is yes and it probably wouldn't be too difficult. this would probably mean loosing the onboard bank though which will slightly limit the maximum possible memory

check to see if there's a bank select mechanism.
I hostly don't think the Sonora has any additional RAM related signals on it (I was hoping for a 12th ram address line to get 128MB simms to work...) but I need to do some additional probing of the unused pins to see what they might be

Would something similar be possible on the LC 520/550 logic boards?
Possibly, they use a Sonora derived chipset so it seems likely the same additional signals would be present but I don't have ones of these boards to hand to be able to say for sure

What you've just described is what Dr. Bob disparaged as The Evil RAS Line Hack done to a Q605/LC475 board over on 'fritter in the Snitz era.
Intresting, that suggests this might be possible on many more machines..... Looks like more investigation is needed!

Interesting... Might have to do that with the LCIII I'm hoping to pick up from @AppaloosaMac this summer.
I might be working on a neater version of this hack (If I can figure out where I'm going to stuff all the RAM IC's!) Stay tuned
What an awesome discovery and future idea!
Wow! Way cool! Great sleuthing Dr. Max!!
Thanks :)
 

Trash80toHP_Mini

NIGHT STALKER
This has been a surprisingly popular request, the short answer is yes and it probably wouldn't be too difficult. this would probably mean loosing the onboard bank though which will slightly limit the maximum possible memory
I really like having this PM skunkworks thread broken out into the open for comment by our resident magicians! Paging @trag :D

Can't imagine "loosing the onboard bank" would be the case. We need to determine if your testbed is addressing three banks of memory. It so there may be a fourth, however unlikely that would be. If all Address/DATA/CAS lines are commonly shared with full RAS/Address cutout to hamstrung Bank A, indications point to a memory structure limited to two banks? CAS/RAS Strobes constitute an XY grid for 32bit Address/Data memory chunks. WAG here is that you're addressing the HIGH half of Bank A in your 16MB limited SIMM bodge with Bank A addressed as LOW per below:

If only two Banks available as it it appears to be set up at present, Bank A (onboard memory) would be addressed as the LOW 16MB half of what's presently limited to 16MB on your bodged SIMM. Such would indicate a maximum loadout of 64MB? Replacing Bank A with a second (currently 16MB limited) SIMM slot requires less PCB real estate than the board mounted Bank A ICs and would unify your bodged 16MB with the hamstrung (but theoretically 16MB capable) on board half of Bank A.

You can test 64MB configuration neatly using a TwinSlot SIMM PCB adapter on the model of a SIMM Saver or open an economy, family size can of bodge on it by running patch wires to Bank A's denuded pad. Implementing an A/B chip select setup like my back burnered plan for dual testing the far back burnered IIsi 128MB hack.

Much will depend upon the blood line of Sonora. If a refined, but 64MB limited implementation of the IIsi/IIci MDU memory controller that's one thing. If it's a direct line offspring of the LCII V8 gate array Memory controller that would be another. However if it's a new ASIC design for the LCIII, it may have been designed as the sire of the 605/475 MEMCjr controller which might prove to be the best thing of all?

The Evil RAS Line Hack should be workable on any Mac hamstrung by a severely limited onboard memory Bank A. Besides the Q605/LC475 and IIsi memory expansion hacks on the back burner, a Q630 maximum memory hack is hopefully in the icebox. Board has been MIA for years now and it's looking like I'll need to source another, but I really want to find my original board from the bought new in the day Quadra 630. :(

Somewhere in the morass of misdirected link attachments there are AI diagrams for my low profile TwinSlot SIMM PCB Adapter design for the Quadra 605. You can easily knock a PCB together for your testing in LCIII, etc. ;)
 
Last edited:

max1zzz

Well-known member
Can't imagine "loosing the onboard bank" would be the case.
That's only if we where modifying the LCIII PCB, and only because the only place I can see a second simm slot could be installed is where the onboard RAM currently is. "loosing a bank" is purely because there would be nowhere for the on-board RAM to go, not because of any electrical or logic issue with it existing alongside two simms

My preference is to design a upgrade board rather than rengineering the logicboard it's self as it's easyier, more universal (AKA can be used on stock boards and repro's) and allows for a higher maximum RAM

in your 16MB limited SIMM bodge
The SIMM bodge will work with 32MB SIMMS, it's only got a 16MB in it at the moment as I couldn't find two working 32MB simms
I did actually get the board to boot once with 2x32MB simms and display 68MB total (2x 32MB simms + 4MB onboard) but didn't take a picture at the time and the simm went back to being uncooperative after that

Given the system will recognise 68MB of total memory I see no real reason 80MB should not be possible if extra address lines where routed to the onboard bank

As far as I can see the LCIII supports 5 banks of memory, one for the onboard, two for the simm and a futher two for the "ghost" simm. Each bank supports 16MB so a total of 80MB over the 5 banks should be possible.

I'm currently designing a 2 piece memory upgrade for the LCIII, one board plugs into the existing SIMM slot and picks up the databus, ram address bus, CAS signals and RAS 1 / 2. The second board will lay flat on the logicboard and have the RAM (Or, space permitting, maybe 2x simm slots) with flying wires to pick-up RAS 0 / 3 / 4
 

jajan547

Well-known member
That's only if we where modifying the LCIII PCB, and only because the only place I can see a second simm slot could be installed is where the onboard RAM currently is. "loosing a bank" is purely because there would be nowhere for the on-board RAM to go, not because of any electrical or logic issue with it existing alongside two simms

My preference is to design a upgrade board rather than rengineering the logicboard it's self as it's easyier, more universal (AKA can be used on stock boards and repro's) and allows for a higher maximum RAM


The SIMM bodge will work with 32MB SIMMS, it's only got a 16MB in it at the moment as I couldn't find two working 32MB simms
I did actually get the board to boot once with 2x32MB simms and display 68MB total (2x 32MB simms + 4MB onboard) but didn't take a picture at the time and the simm went back to being uncooperative after that

Given the system will recognise 68MB of total memory I see no real reason 80MB should not be possible if extra address lines where routed to the onboard bank

As far as I can see the LCIII supports 5 banks of memory, one for the onboard, two for the simm and a futher two for the "ghost" simm. Each bank supports 16MB so a total of 80MB over the 5 banks should be possible.

I'm currently designing a 2 piece memory upgrade for the LCIII, one board plugs into the existing SIMM slot and picks up the databus, ram address bus, CAS signals and RAS 1 / 2. The second board will lay flat on the logicboard and have the RAM (Or, space permitting, maybe 2x simm slots) with flying wires to pick-up RAS 0 / 3 / 4
This is cool, I’m gonna try it out.
 

max1zzz

Well-known member
First stage of the "neat" version of the upgrade is done and for a totally passive board this took ages to draw.....
22-05-22.JPG

This just breaks out all the RAM signals available on the simm slot to JST SH connectors to connect to the RAM board
I'll start on the actual RAM board tomorrow :)
 
Last edited:

max1zzz

Well-known member
So the hole breakout board thing didn't work as planned, so I ended up going another route and making a custom quad rank simm:
IMG_2263.jpg
This simm has been tested and seem to work fine, and even fit's in the case too!
 
Top