MicroMac Performer SE Mod

[Busterswt]

With some spare time at hand, I've taken upon the task of determining whether or not the MicroMac Performer 68030 upgrade for the Macintosh SE can be installed directly to a DIP64 socket on the motherboard rather than the using the SE PDS slot. This would be similar to operation on a Macintosh Plus, except rather than piggyback onto the stock 68000, the 68000 would be completely removed. 

I have two of these cards, and this one will serve as the test subject on a second Macintosh SE motherboard:

Tonight's goal was to remove the PDS connector from the accelerator card and to remove the 68000 from the motherboard. The first task was pretty straightforward, although a few of the pins had to be tugged on a bit to allow the connector to separate from the board:

On the SE, the 68000 is not socketed, so some work had to be done to remove that:

Even with a desoldering gun, I had to sacrifice the 68000 due to growing impatience:

I test-fit some new DIP64 sockets on the motherboard and the Performer. Too late to solder them in, but looking good so far:

Before I started, I was able to determine the proper alignment of the Performer to the 68000 pins on the motherboard, and a test fit (sans header pins) looks good so far:

There is about 2mm of clearance from the edge of the board to the brown socket on the left in the image, and with with 1x32 header pins installed to connect the accelerator to the motherboard that clearance will grow to about 3-4mm or so. Still should be lower than it was when connected to PDS slot.

I am waiting for the header strips to arrive from eBay/China sometime this coming week, and hope to have some good news then. Worst case scenario, I can solder the strips to another 68000 if it does in fact need to be there. The one thing that might really hold up the success of this test is the lack of a GAL at U7. The Macintosh Plus version of this board has that GAL populated, so it may be necessary when PDS isn't used, I'm not sure. I have not seen a Classic version to know if U7 is there or not.

My two SE boards here:

 

[Busterswt]

For those interested, I finished soldering the DIP64 sockets to the Performer and the SE motherboard, and connected them using 1x32 strips:

Installed the RAM, reinstalled the board, closed the case, and fired it up:

There was no startup sound played, only the thick, vertical lines you see here. I haven't ruled anything out, yet, and may try the other Performer in the PDS slot without the 68000 installed to see if there are similar results.

 

[Trash80toHP_Mini]

Dang, my guess was that it would need the 68000 to work when you asked, but I'd hope to be proved wrong. Both cards tested good in the PDS before you started? Dunno about the missing GAL, you've got too many variables waving in the wind. The PDS sans CPU sounds like a good plan of attack. Best of luck.

Bolle outlined the functions of the GALs of his Total Systems accelerator in another Performer thread:





The short & the edited, I forgot to ask which GAL functions might align with the silk screen designations on the Performer:

U__ = GAL1 is the 030 clock state machine

U__ = GAL2 is a cache controller

U__ = GAL4 & 5 are the 68000 bus state machine

U__ = GAL6 is the address decoder

U__ = GAL3 - actually a 6th GAL - can be used for switching between 68000 and 68030

@Bolle the equivalent of which GAL do you think is unimplemented at U7 on the SE version?

 

[Bolle]

he short & the edited, I forgot to ask which GAL functions might align with the silk screen designations on the Performer:

U__ = GAL1 is the 030 clock state machine

U__ = GAL2 is a cache controller

U__ = GAL4 & 5 are the 68000 bus state machine

U__ = GAL6 is the address decoder

U__ = GAL3 - actually a 6th GAL - can be used for switching between 68000 and 68030

Pretty sure I was talking about something else there, not the Micromac accelerator.

 

[Bolle]

There was no startup sound played, only the thick, vertical lines you see here.

Is the accelerator actually getting +5V power?

Most accelerators I have seen that work in the Plus and the SE and have a PDS slot and a 68k socket type mount have a (solder) jumper somewhere to connect the power plane to the 68k 5V pin or to an external power supply.

 

[Busterswt]

Is the accelerator actually getting +5V power?

Most accelerators I have seen that work in the Plus and the SE and have a PDS slot and a 68k socket type mount have a (solder) jumper somewhere to connect the power plane to the 68k 5V pin or to an external power supply.

I have not verified power at the accelerator.

The only visual differences between the SE and Plus/Classic models appear to be the GAL at U7. That GAL appears to connect to the CLK line on at least the PDS and 68-pin 68000 connector. I don't have good visuals on the rest of the lines.

For grins, I connected the other Performer to the PDS slot of the 68000-less motherboard and got the same results: thick, vertical lines. Upon installing a 68000 into the now-installed socket, the SE chimed and booted up as expected.

 

[Trash80toHP_Mini]

I'm still guessing the driver INIT needs to run on the 68000, disable it and hand over function to the Performer. One method oaf attack would be to examine the driver. Comparison of the SE PDS connector pinout to the 68000 would be another. Buzzing the connections from U7 to the PDS would have been my first line of research for your problem, but was last and never done for my purposes. You might want to look into the differences I found between the Portable PDS and the SE PDS, ostensibly the 68000 interface, but with slight variations.

View attachment 21582

Pretty sure I was talking about something else there, not the Micromac accelerator.

Yep, the Total Systems board with the RAM upgrade, that was above the quote. Should have reiterated when I asked the question. I was wondering if there might be parallels between GAL functions between the boards. Hoping to spot the U7 GAL function and wondering if adding it might be the missing link. I barely started with U7 last winter but here is the schematic @IlikeTech developed from my coloring book diagrams for each of the GALs.

View attachment 21506

The Clocks/U7 show up here, but didn't make it into the schematic, possibly because it wasn't verified?

View attachment 21530

@Busterswt sorry about linking so many pics from the other thread. I'll stop if you like, but they seemed relevant to your Hunt for U7.

edit: It'll be a lot easier for you to drag your continuity tester along the soldertails of the SE PDS connector from the pads of U7 than for me to do it from U7 legs to empty thruholes. Doing that will help complete my recreation attempt and your CPUectomization study.

Offhand, if the 68000 clock from the PDS is connected to any other than pin 3 on U7 that would be most revealing.

 

[Trash80toHP_Mini]

Found something interesting, you have RevA and Rev? versions of the performer with differences in the surface traces of U7:





Does Pin 3 appear to be marked for trace cutting rework between Classic connector thruhole and SE PDS? Wondering what difference that might make: universal board revision? U7 has three pairs of legs tied together and has been rotated counterclockwise in Rev? by 90 degrees.

Between your two SE types, my Plus and the @EvilCapitalist Classic version we have revisions for all supported Macs.

EvilCapitalist's Classic:



My Plus.



Eyes just glazed over, the Crystal Cans on all four cards appear to be 25MHz? Still guessing it's a sampling rate/whatever used by U3 and U4 that's converted to 16MHz in U5.

 

[Trash80toHP_Mini]

Found it in the redux thread after giving up on rearranging peripherals to check out the AI files on the QS. The USB KVM Switch apparently vented an undetectable bit of magic smoke last week. That was bugger to find, last thing I checked. 

Anyhoo, top left corner, fat yellow line, llight gray comment. Anybody care to take the other side of the bet that the A1/A0 bus addressing situation buggers this config but good? Without the 68000/INIT running at boot to set up address bus translation so the Performer 68030 32bit (A0-31) address bus can operate on the SE 23bit (A1-A23) address bus?

View attachment 21552

 

[Trash80toHP_Mini]

If I'm right about needing the 68000, that opens up an interesting possibility. Gotta look it over, but your CPU socket mod and an adapter PCB with a 68000 socket and headers for any given KillyKlip interface accelerator might be a clean method of installation, clearing the PDS slot for a standard PDS card as in Bolle's SE/30 chassis mod.

 

[Trash80toHP_Mini]

Pretty sure I was talking about something else there, not the Micromac accelerator.

Somewhere in there you'd said that you wouldn't be surprised if our two different accelerators and sets of GALs were the same. TotalSystems/Quesse vs. Performer and I figure you meant functionally, not them being identical.

Here you have info on the address bus situation and A0.





I can see why the PowerCache runs with the CPU socket empty, but somehow I just cant imagine a two generations later CPU on an accelerator running without the host setting it up.

edit: tried too late to clear out the A0 diagram above, but just barely overran the edit window, Also just realized that the / markings I asked about above denote chip orientation. DuOh! :

 

[360alaska]

I wonder if you could solder a 68000 on the top of the accelerator?

 

[Trash80toHP_Mini]

Good idea, but two of the GALs are located between the rows of pins for the 68000. That'd make it difficult, my question would be vertical clearance?

 

[Trash80toHP_Mini]

View attachment 25790

U7 pin  3 is connected to PDS A28 C8M

U7 pin 13 appears to be connected to PDS A29 C16M or one of the other pins through that via?

Are some of pins on row 9-13 bridged? They look like they might be?

Presence of C16M on the SE PDS would appear to a good reason why U7 might be unimplemented. It's the only GAL connected to all three clocks. That makes me wonder if adding GAL U7 might fix anything for your conversion outside of the missing CPU config?

 

[Busterswt]

I've considered tacking the 68000 to the Performer as a quick test, but I suspect U7 will absolutely be needed.

Using an ohmmeter and visual inspection I was able to determine the following (for what it's worth):

I'll try and pick up some better hardware to buzz things out more completely if it'll help.

 

[Trash80toHP_Mini]

It's definitely a help. A couple of things, it's very easy to get the rows mixed up:

C8M   is pin A28 on the PDS

C16M is pin A29 on the PDS

That's straight out of DCaDfMIIaMSE.

The more continuity testing you can do the better! It will definitely help.

Check to see if U7 is connected to the 25MHz crystal on Pin 1 I/CLK. That's what I have in my notes.

C16M from the PDS enters U6 on pin 2

C16M from the PDS enters U7 on pin 13

C8M   from the PDS enters U6 on Pin 1

C8M from the PDS enters U7 on Pin 3, the trace leads to Pin 15 CLK on the 68000 and to all GALs except U3 from what I've found so far.

Pin 19 ( I/O/Q ) of U6 drives the 68030 clock at 16MHz

Buzzing the U7 pads to the PDS connector and to the rest of the GALS would help a lot.

I'm a bit tired, but that's the way I have it. Confirmation of the above will be welcome and any new discoveries will be delightful. I'll see if I can pull my Performer out for some playtime. Doing my coloring book page for U7 will be fun. []

 

[Bolle]

Oh right, you won't get the 16MHz clock signal if you connect to the 68000 instead of the PDS, so your 030 is not running.

So it would make sense for U7 to be a clock multiplier on the Performer.

Implementing a clock doubler in a new GAL should be an easy thing to do.

 

[techknight]

Well a GAL doesnt have a built in PLL, so how does it expect to double the clock?

 

[Bolle]

You can build frequency doubling circuits using XOR gates and a delay. That will work just fine with a GAL.

If you look at the inputs and outputs chained together on the board that's how they implemented the delay using the propagation delay of the chip several times in a row.