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Quadra 650 nubus
- Thread starter russman
- Start date
In such situations, I have had very good luck reformating the drive on a PC with an Adaptec SCSI card. If you have such available or have a friend with one, you may be able to recover the drive.
The older Adaptec cards such as the 2940UW have an option at start-up to press ctrl-A and enter the firmware routines. One of those routines will do a low level format of the hard drive and I've found that that will usually recover the drive for Macintosh use.
Since you can probably find a 2940UW for $10 or lieing around in a ditch waiting to be picked up, your biggest obstacle would be coming up with a PC to try it in.
Alright i downloaded Lido, put it on a CD. The program opened but as it got to ID 0 it threw errors at me and I was unable to do anything (one said unable to read drive capacity, other said something like bad scsi command). I'm trying Anubis Plus right now , seems to be working but I am worried about the errors in Lido.
http://cgi.ebay.ca/SuperMac-Thunder-II-Video-Card_W0QQitemZ110263403993QQihZ001QQcategoryZ4601QQrdZ1QQssPageNameZWD4VQQcmdZViewItem
Too bad its so far away, in Australia.
Too bad its so far away, in Australia.
Techfury90, you say "The Jackhammers only are 20 MB/s"
I bought six of them new (different type), and have to proclaim that three of the pci ones with 6 seagate 12450Ws total were faster in benchmarks than the unix NULL device on a high end sun workstation, which did not have to actually even store bytes. ( dev/nul )
Keep in mind the seagate 12450W was a fragile special type of drive only made once in history and had TWO heads per surface of each platter. TWO ! They were very fragile. But in 1994 they were 12 megabytes per second each sustained if formatted with 2K blocks. With 512 byte blocks four drives got 34 MB/sec on quadra 840avs using a pair of two jackhammer cards.
But its amusing to point out that PowerPC macs were slow as hell for a very very long time for slot I/O vs Quadra 840av and its NuBus. (quadra had double clocked nubus, and the cpu was 80 mhz internally, not 40, if you are literal).
i think a 650 has a direct processor slot allowing access at 33 Mhz/32 bit, but few cards ever made for it I assume.
I think you are right though about one card being overkill for it though, if xfering data to the motherboard and not another nubus card.
In a early Quadra 20 Mhz (not 10) was possible, and for 32 bit xfers that would be bursts of 80 MB/sec between two non-apple nubus products.
in later quadraas (840av) the slots really ran allowing 40 MB sec with ease and practically begging for two jackhammer cards.
Interestingly, RAM could barely eat the data that fast so you had to do something such as move it 128 bits at a time per opcode , when not doing DMA from scsi, via MOVE16 instructions using the cache controller as a high speed datapump.
Anyway I am biased because I own few quadras, used to work at FWB for a few years, and also used to run the fastest RAID anyone could afford (or not afford) to construct for specialized animation pruposes (uncompressed full frame video playback).
But if a person asks what the fastest setup could be, chances are they want to know their options.
----
I am just bummed that motorola was so many years ahead of the world of technology. Motorola REFUSED to consider ever making 5 volt modern CPUS ever again and wanted everyone to recreate entire motherboards oriented around the astounding 3 volt 68060 chip
a chip that would have rewritten history and made the powerpc look like a sick joke
but the world had been 5 volt for the previous 40 years and refused to budge.
nothing became of the beloved 68060 , not even at NeXT
ov course soon after the world learned how to run the cpu at different voltages than mobo, and 3 volt became a norm, then 2v, 1.5 , 1.2 v
poor motorola, they were right, and 5 years ahead of the world
do not ever forget, it was 3.5 times faster than a 68040 chip in benchmarks
and if apple went for it moto would have made more newer ones.
RISC was a dead end. Even in 2008 the CPU champion is a CISC (the pentium offspring x86).
Now RISC is dead for apple. Shame on apple for not making even one apple with a 68060 to run rings around your initial powermacs.
I bought six of them new (different type), and have to proclaim that three of the pci ones with 6 seagate 12450Ws total were faster in benchmarks than the unix NULL device on a high end sun workstation, which did not have to actually even store bytes. ( dev/nul )
Keep in mind the seagate 12450W was a fragile special type of drive only made once in history and had TWO heads per surface of each platter. TWO ! They were very fragile. But in 1994 they were 12 megabytes per second each sustained if formatted with 2K blocks. With 512 byte blocks four drives got 34 MB/sec on quadra 840avs using a pair of two jackhammer cards.
But its amusing to point out that PowerPC macs were slow as hell for a very very long time for slot I/O vs Quadra 840av and its NuBus. (quadra had double clocked nubus, and the cpu was 80 mhz internally, not 40, if you are literal).
i think a 650 has a direct processor slot allowing access at 33 Mhz/32 bit, but few cards ever made for it I assume.
I think you are right though about one card being overkill for it though, if xfering data to the motherboard and not another nubus card.
In a early Quadra 20 Mhz (not 10) was possible, and for 32 bit xfers that would be bursts of 80 MB/sec between two non-apple nubus products.
in later quadraas (840av) the slots really ran allowing 40 MB sec with ease and practically begging for two jackhammer cards.
Interestingly, RAM could barely eat the data that fast so you had to do something such as move it 128 bits at a time per opcode , when not doing DMA from scsi, via MOVE16 instructions using the cache controller as a high speed datapump.
Anyway I am biased because I own few quadras, used to work at FWB for a few years, and also used to run the fastest RAID anyone could afford (or not afford) to construct for specialized animation pruposes (uncompressed full frame video playback).
But if a person asks what the fastest setup could be, chances are they want to know their options.
----
I am just bummed that motorola was so many years ahead of the world of technology. Motorola REFUSED to consider ever making 5 volt modern CPUS ever again and wanted everyone to recreate entire motherboards oriented around the astounding 3 volt 68060 chip
a chip that would have rewritten history and made the powerpc look like a sick joke
but the world had been 5 volt for the previous 40 years and refused to budge.
nothing became of the beloved 68060 , not even at NeXT
ov course soon after the world learned how to run the cpu at different voltages than mobo, and 3 volt became a norm, then 2v, 1.5 , 1.2 v
poor motorola, they were right, and 5 years ahead of the world
do not ever forget, it was 3.5 times faster than a 68040 chip in benchmarks
and if apple went for it moto would have made more newer ones.
RISC was a dead end. Even in 2008 the CPU champion is a CISC (the pentium offspring x86).
Now RISC is dead for apple. Shame on apple for not making even one apple with a 68060 to run rings around your initial powermacs.
I dunno about the internal workings of the AMD chips, but the modern Intel chips have a very RISC-like microcode that all the x86 instructions are broken down into. The silicon doesn't actually have paths for the x86 instructions, which makes the RISC vs CISC debate extremely poorly defined.
CISC died when the Pentium Pro came out, its been RISC ever since internally from Intel, the K5 series (Pentium equivalent) I think was RISC as well from AMD.
The best thing about PPC was the FPU completely obliterated anything 68K (even the 68060), so moving to PPC was smart. 68060 wasn't even compatible with the rest of the 68K line before it, so it wasn't going to be used by Apple anyway.
While I love Nubus, it sucks compared to PCI.
The best thing about PPC was the FPU completely obliterated anything 68K (even the 68060), so moving to PPC was smart. 68060 wasn't even compatible with the rest of the 68K line before it, so it wasn't going to be used by Apple anyway.
While I love Nubus, it sucks compared to PCI.
I was under the impression that the CPUs beyond the original Pentium (I believe starting with the PPro) were a hybrid of both CISC and RISC methods. I remember going through this article back in 1999 from Ars Technica:
http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
Incidentally, there's another followup almost 10 years later from that article, specifically in regards to mobile processors, and especially Atom:
http://arstechnica.com/articles/paedia/risc-vs-cisc-mobile-era.ars
http://arstechnica.com/cpu/4q99/risc-cisc/rvc-1.html
Incidentally, there's another followup almost 10 years later from that article, specifically in regards to mobile processors, and especially Atom:
http://arstechnica.com/articles/paedia/risc-vs-cisc-mobile-era.ars
Well some translation is going on at the front end, but all the work should be RISC.
From my understanding RISC is just made up of small simple commands that you can speed up and pipeline, while CISC used larger more complex blocks that you had to deal with in specific order.
To keep compatability with the old desgins you needed a chip that handled the older code, so a translating unit seems to have been the smart thing to do.
Under a microscope a new CPU core probably looks alot different then a 386 one.
From my understanding RISC is just made up of small simple commands that you can speed up and pipeline, while CISC used larger more complex blocks that you had to deal with in specific order.
To keep compatability with the old desgins you needed a chip that handled the older code, so a translating unit seems to have been the smart thing to do.
Under a microscope a new CPU core probably looks alot different then a 386 one.
The way I heard it was that the idea behind RISC was that the instructions weren't as powerful as CISC instructions, but could be manipulated in more ways than CISC instructions. Example: It might take several RISC instructions to do the same thing as one CISC instruction, but those less powerful RISC instructions could be recombined in different ways to do things more efficiently than using more complex CISC instructions which may have been more wasteful of CPU and memory resources.
Not quite, simplisticly...
(a) large register file - reducing memory accesses
( B) same length instructions - simplify fetch queue
© each instruction takes one clock cycle - rather than variable number
CISC have variable length instructions and variable execution time per instruction.
(a) large register file - reducing memory accesses
( B) same length instructions - simplify fetch queue
© each instruction takes one clock cycle - rather than variable number
CISC have variable length instructions and variable execution time per instruction.
