We've long had reprogrammable ROM SIMMs replacement. Those ROMs often have little improvements, such as skipping memory tests and adding ROM disks.
I wonder whether anyone with experience in developing those ROM boards would consider the following: Add a latch chip with sufficient drive for a small 8-segment or 16-segment LED display. When the Mac writes to the ROM, the bits would light up the various LED segments to provide a "post code" similar to the IBM PC community. Since the ROM is reprogrammable, we could pepper the code with writes to ROM (which would update the display) at various check points as it was booting.
Hopefully, the ROM SEL line is driven low even during writes. If so, one could add address decoding to either select the ROM or the LED latch (which would be placed perhaps at the end 32-bits of ROM space). This would avoid reads to the ROM being written to the latch.
If the ROM SEL line is not driven during writes, then a bodge IC clip would need to be included to attach to the read/write line.
Frankly, even if the ROM SEL line is driven during writes, then a bodge IC clip could be included anyway, and an address decoder would be unnecessary. In that case, the read/write line would control whether the ROM would output, and all writes (to any ROM address) would be placed in the LED latch.
The other cool usage of this would be to aid general hardware/software development. With a "diagnostic ROM" in place, you can display whatever values you want on the LED latch to hunt down bugs or indicate status. For example, if you have a driver where timing is critical or is difficult to debug, a simple write to ROM is all that is necessary to help trace your code.
Any thoughts on the concept?
- David
I wonder whether anyone with experience in developing those ROM boards would consider the following: Add a latch chip with sufficient drive for a small 8-segment or 16-segment LED display. When the Mac writes to the ROM, the bits would light up the various LED segments to provide a "post code" similar to the IBM PC community. Since the ROM is reprogrammable, we could pepper the code with writes to ROM (which would update the display) at various check points as it was booting.
Hopefully, the ROM SEL line is driven low even during writes. If so, one could add address decoding to either select the ROM or the LED latch (which would be placed perhaps at the end 32-bits of ROM space). This would avoid reads to the ROM being written to the latch.
If the ROM SEL line is not driven during writes, then a bodge IC clip would need to be included to attach to the read/write line.
Frankly, even if the ROM SEL line is driven during writes, then a bodge IC clip could be included anyway, and an address decoder would be unnecessary. In that case, the read/write line would control whether the ROM would output, and all writes (to any ROM address) would be placed in the LED latch.
The other cool usage of this would be to aid general hardware/software development. With a "diagnostic ROM" in place, you can display whatever values you want on the LED latch to hunt down bugs or indicate status. For example, if you have a driver where timing is critical or is difficult to debug, a simple write to ROM is all that is necessary to help trace your code.
Any thoughts on the concept?
- David
