Hi guys,
Although we often mention Marc Schrier's page, we all should give a credit regarding this mod to that person from Japan, namely
Hiromasa Yamaoka
who was first to do such mod.
In all Quadras + IIVx this PLL works as Frequency doubler. That means, you put 12.5MHz in and out comes 25MHz. You put 20MHz in -> out comes 40MHz.
Now, if You read Motorola's MC88920 and MC88916 data sheets very carefully, you will see that:
1. MC88920 has been designed specifically for the 20 and 25Mhz 68040 microprocessors.
2. MC88916DW70 will work at max 35 MHz processor frequency and has been designed for faster than 25MHz processors.
3. MC88916DW80 will work at max 40 MHz processor frequency and also has been designed for faster than 25MHz processors.
If the manufacturer says what we should use, it would be good engineering practice to follow his recommendations. In our case we all should be using DW80 version, not even DW70!
Running 35 MHz part (DW70) @ 40 MHz is already 5 MHz too much, but running 25 MHz part at that frequency is living on the edge.
Regarding heatsinks on "real" 68040/40 - just look how its done in Q840 - full 68040@40MHz, regular pin-grid heatsink. DW80 PLL chip. And it keeps going.
ojfd
Although we often mention Marc Schrier's page, we all should give a credit regarding this mod to that person from Japan, namely
Hiromasa Yamaoka
who was first to do such mod.
There could be numerous reasons. Gazelle clock generator chip (Apple p/n 343S1135 -a) is not documented anywhere (anyone care to ask Apple's engineering department ;-) ), hence nobody really knows what's going on inside that chip. It might be that it can't generate "clean" 40MHz due to its internal limits. It might be that long traces + extra capacitance at 40MHz distorts signal waveform. Nobody knows... I have absolutely no motivation to poke around with my Tek TDS724 scope inside that poor Q605 trying to improve it or demistifying Gazelle chip's inhards . If it works with extra oscillator, why bother? Period.But I've always wondered why the straight resistor swap won't do the trick. Schrier's page says it doesn't work, but it also doesn't say that anyone ever tried it with the clock generator/buffer swap. It seems to bear more experimentation. One of these days...
"johnklos", _You can not make it work without the help of PLL chip in any way_! (PLL stands for Phase Locked Loop, check Google or Wiki how it works, in caseYou don't know.)The process is simpler than sourcing a MC88916, and simpler installing, too. Just get a 20 MHz oscillator, take the power for it from the 31.3344 MHz oscillator on the corner of the motherboard by the video connector, remove R93 from the backside (also close to the video connector), and run the 20 MHz oscillator's output to the inside pad where R93 used to be (by inside I mean towards the center).
In all Quadras + IIVx this PLL works as Frequency doubler. That means, you put 12.5MHz in and out comes 25MHz. You put 20MHz in -> out comes 40MHz.
Now, if You read Motorola's MC88920 and MC88916 data sheets very carefully, you will see that:
1. MC88920 has been designed specifically for the 20 and 25Mhz 68040 microprocessors.
2. MC88916DW70 will work at max 35 MHz processor frequency and has been designed for faster than 25MHz processors.
3. MC88916DW80 will work at max 40 MHz processor frequency and also has been designed for faster than 25MHz processors.
If the manufacturer says what we should use, it would be good engineering practice to follow his recommendations. In our case we all should be using DW80 version, not even DW70!
Running 35 MHz part (DW70) @ 40 MHz is already 5 MHz too much, but running 25 MHz part at that frequency is living on the edge.
Regarding heatsinks on "real" 68040/40 - just look how its done in Q840 - full 68040@40MHz, regular pin-grid heatsink. DW80 PLL chip. And it keeps going.
ojfd