Whatever it's doing, that chip's the functional equivalent of the PAL on that $200 .jp PowerCache adapter/PDS Slot Riser for the SE/30!
Like i said, it puts the Cache in the correct spot on the memory mapped IO.
speaking of which, I may have to design a tiny bit of logic to further decode slot space on the SE/30 to the LC card.
Because the slot space not only works in 24 bit mode, but also in 32 bit mode which moves up a nibble in the address chain. Also, in 32bit mode you have the 16mb space, and the 256mb super slot space, which moves up even to the highest nibble.
So i need to decode all 3 of those to make sure it sees the card in all 3 spaces. But alas, i cant just simply swap address lines, as it will only work in 1 space. as a high space, the address lines swapped become memory addressing lines for the card instead of select lines, which will screw up the read.