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Overclocking the Sonnet Encore ST/G4


Well-known member
Hi everybody,

I am wondering if the Sonnet Encore/ST G4 series can be overclocked similar to the Encore/MDX G4 Duet series as seen on http://macos9lives.com/smforum/index.php?topic=3523.0 by Knezzen and MacTron.

Here is a picture of the underside of the 1.6GHz card:

under sonnet encore st g4 1.6.png

...the 1.7 GHz card:

under sonnet encore st g4 1.7.jpg

and the 1.8 GHz card:

under sonnet encore st g4 1.8.jpg

There are VRMs on the upper side but I'm wondering if this cluster of resistors -- 66, 67, 68, 69 -- can affect the cpu speed?


Well-known member
If there are no other alterations in resistor placement (R44 looks like another), then yes you could make an educated guess that this will adjust the CPU multiplier. But the usual disclaimers of at your risk, another 100Mhz won't do much at all in real world performance, and additional cooling may be required!


Well-known member
It is likely that it can be overclocked, as the 74xx series of CPUs were very overclockable. So counting the BGA pads (360), that's either a 7445 or 7447, or even a 7448. (I'd bet on a 7447.) That means there are 5 PLL configuration (PLL_CFG) signals. (0 through 5.) So right off, the highlighted resistor banks in those pics are suspect to me, because there's only four in that block.

If we assume Sonnet's rated speeds are for a 133MHz bus, which is the most common bus speed on PowerMac G4s, then, for example, 1700/133 gives us a multiplier of 12.78, which rounds to either a 12.5x or 13x multiplier. The PLL_CFG for 12.5x is 11111, while 13x is 01011. I don't see any resistor banks in the 1700 pics that would indicate either of those and are unique to that board. (i.e. appears that way on the 1700 but not the 1600.) So maybe the assumed bus speed is wrong. If we assume they rated it for a 100MHz bus, that would be 1700/100 = 17x. The PLL_CFG for 17x is 00001. With that, R44/45/46/47/48 would seem to match. So let's see if a 16x on the 1600 matches the pattern on that resistor block. 16x is 11011. No dice, since none of those five resistors are populated on the 1600 board.

So how about 167MHz? 1700/167 gives ≈10.18x, which we can either round down to 10x or up to 10.5x. 10x has a PLL_CFG of 10101, and 10.5x has a PLL_CFG of 10001. No resistor banks seem to match, so that's probably a no-go. But just to be thorough, 1600/167 gives ≈ 9.58x. There is a 9.5x multiplier for the 74x7 chips, so let's run with that. The 9.5x PLL_CFG is 01110. Again, no match.

The other issue is that there's no matching banks of 5 resistors. PLL_CFG is configured using both pull-up and pull-down resistors. (4.7KΩ and 1KΩ, respectively, represented by a 1 and 0, also respectively.) So there should be 10 resistors that configure the PLL circuit. Probably the best way to find out which resistors are used for PLL_CFG would be to desolder the CPU, and then test for continuity between the pads for the PLL_CFG pins (A7, B8, C7, C8, and D7) and various resistors' pads. And it could even be that those cards just use the PLL_CFG on the main logic board. Who knows? That's the fun of reverse-engineering: figuring out how stuff works! :)


Well-known member
The PLL config on those is done by the PLD. The upgrade detects if you‘re running 100 or 133MHz bus speed and sets the CPUs PLL config pins accordingly to run as close to the rated speed as possible.
So if there are resistors their layout will not match the 74xx PLL_CFG but will rather just tell the PLD which target speed it should set. The second possibility is that they hardcoded the speed into the PLD firmware.


Well-known member
Oh interesting! I didn't know that! That makes sense, though. So really it would come down to experimentation, then.


Well-known member
hopefully without desoldering...


  • Screen Shot 2021-07-19 at 2.29.15 AM.png
    Screen Shot 2021-07-19 at 2.29.15 AM.png
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Well-known member
would Sonnet have made different PLD firmware for different speeds, or set the speed downstream (using PLL) of the PLD after it detects the bus?


Well-known member
if the PLL downstream of the PLD scenario were true, would the PLL logic still be similar to the 74xx logic


Well-known member
the highlighted resistor banks in those pics are suspect to me, because there's only four in that block.
The other issue is that there's no matching banks of 5 resistors
I'm way out of my depth here, but do have a couple of these including (I believe) the 1.8Ghz... @Byrd mentioned R44... isn't that part of a set of 5 resistors - that seem to vary between "speed" variants? Top left corner...


Well-known member
Looking at the datasheets,

The PLL_CFG[0:5] would be 6 resistors (even though 5 is moot),

IF it is true that the CPLD controls the frequency THEN the resistor should be set to "PLL Bypass"

According to the PLL chart:

Screen Shot 2021-07-19 at 10.32.41 PM.png

that would mean "001100" which looks like it is feasible this could be resistors R49-R54?

Screen Shot 2021-07-19 at 10.41.10 PM.png

So, could the converse be true: can you by bypass the "bypass" by manipulating the resistors to set values from the PLL_CFG table?


Well-known member
It looks like the JTAG interface is at J3 and would need to be connected with flyleads. I wonder if this https://ebay.us/eMdcW1 would work. I'm not sure if that would reverse engineer it? re-looking at the R49-54 resistors I don't think they are part of PLL.


Well-known member
On the 7448, the 6th PLL signal is only used for factory testing and should always be pulled low, so if those cards use a 7448, you can bet your buttons that it's already being pulled low, and can safely be ignored. (Note that in that table of PLL configs, it's always a zero, indicating that every PLL configuration has it pulled low.)

But anyway, as Bolle said, if there are resistors to set the clock speed, their layout will not match the 74xx PLL_CFG but will rather just tell the PLD which target speed it should set. (And I doubt that the PLD would have a setting for PLL bypass.) And looking at the board, offhand it doesn't look like it would be set via pullup/pulldown, but rather using those resistors as a switch. (Basically the same thing that a DIP switch would do, but with SMD resistors instead.) So my guess is that it's the block of resistors that you initially highlighted (R66–69) and/or R44–48 that accomplish this. Probably both, since each block seems to connect to its own chip (at RP1 and RP2) which I assume has something to do with setting frequency. If we knew what chip that was (a clear extreme closeup shot via macro/magnifying lens or microscope would help) then we could track down its datasheet and learn a lot more. For example, it could be some kind of ASIC clock generator for all we know.

As it stands, with the information available, if it were me, I'd probably start by just taking the 1.6 board, configuring those resistors to match the 1.7 board (stuff R44, R66, and R67, and unstuff R68) and seeing if that does anything. If it works, try configuring it next to match the 1.8 board (unstuff everything except R67) and see if that works. I imagine it would work, since they seem to use the same PCB for all three products. Pushing beyond that could just be a matter of experimentation, or even just finding a datasheet for all we know.


Well-known member

On my 1.6 Encore, I removed R 68 and bridged R 69 and this gave me a speed of 1.15. Anything higher than 1.6 would not give a chime. So if the above resistors hold true, then I assume the pattern would look like this below? These are 0 Ohm resistors so they are just bridges. I used normal wire.



Active member
Nice! You've confirmed that you can change the speed through the microcontroller. I wonder which speed combinations are supported. If the older sonnet boards use the same controller, the 800 and 1000MHz cards might give you more data points. Perhaps there's even a reasonable pattern to the settings...


New member
Hey guys, anyone try any other jumper settings? I have a 1.8 Sonnet card on the way and intend to see if I can get it to 2.0 like those guys in the MDX Duet thread did.