Anyway the term "clock doubled" refers to the speed at which the processor's transistors switch relative to the base frequency, not instruction throughput per base clock cycle.
And the 68040 is not *clock doubled* in any respect even if we accept that internally it "runs" at PCLK instead of BCLK because that ratio has no bearing on how fast it operates compared to some other CPU, IE, there is no "non-clock-doubled 68040" to compare it to. IE, the phrase is meaningless when applied to it. (As noted before, the old 80386DX has a pin on it that needs a clock twice the CPU's "rated speed"; I looked up the datasheet for that as well and it doesn't seem like it does anything with that clock other than divide it, but there are some weasel words about clock phases differing between the core and the bus so... ???? I didn't build it so I have *no* idea.)
Plenty of CPUs "switch their transistors" at speeds faster than the input clock. This has been a thing for a long time. (An off-the-top of my head example which I *think* is correct is the old Motorola 6809, which had two input clocks, E and Q, which ran about 50% out of phase with each other, and some operations of the ALU and bus happen in half a phase, effectively switching at "twice" the rated clock speed of the CPU. A more recent example is the Pentium 4:
parts of the ALU operate at twice rated clock speed of the CPU. Based on this why didn't Intel call the 1.4ghz Pentium 4 a 2.8Ghz CPU?)
Obviously the 486DX2 doubles its base clock input internally
I was not talking about the DX2, I was talking about the plain-old 486DX, which according to the manual internally generates multiple phases from the input clock to cadence its internal guts. IE, there are parts of plain, non-doubled 486 that could arguably be said to be operating at twice the input clock. The reason I compared this to the 68040V is because that CPU doesn't have a discrete separate pin for PCLK (it only has BCLK), it generates that "double speed" internally...
Or, maybe the 68040V doesn't use PCLK at all. The major difference other than voltage is it's a fully static design, the original 68040 isn't. PLCK might be necessary in the plain 68040 in part to handle some sort of refresh function. My ignorant guess based on some of the diagrams in the PDF is it's used to pace the pipeline but, again, no idea, I didn't build it.
Why Motorola didn't choose to advertise this clock doubling is beyond me.
Anyway the term "clock doubled" refers to the speed at which the processor's transistors switch relative to the base frequency, not instruction throughput per base clock cycle.
If you want my guess as to why Motorola didn't advertise the CPU based on the PCLK speed it's because they didn't think that *is* the CPU's effective speed. (And perhaps they also thought rating it at that speed would invite negative comparisons to the 80486... because if they counted instruction cycles in PCLKs instead of BCLKs the minimum cycle time would be 2, not one. I can just imagine the articles ripping them for that. "The 68040 claims to run at twice the clock of an equivalent 486, but the truth is more complicated than that...". If you have any doubts this would be the case, well, when the DX2s came out every PC magazine on earth was chomping at the bit to benchmark the 50mhz DX2 against the non-clock-doubled 50mhz DX and give their hot take on how the DX2 wasn't *really* a 50mhz processor.) Here is a manual that has the instruction timings in it:
https://www.slac.stanford.edu/grp/cd/soft/vxworks/doc/cpu/vme/68k/mc68040/M68040UM.pdf
The section that explains that all timings are in BCLKs is in section 10-4.(**** see below) And again, the minimum time is "1". (Note in some of the boxes where you see "1/2" that's not half a clock, that's either one or two clocks depending on some factor, like data word length.) The 486 also does some instructions in one clock cycle. Therefore whether you declare the standard 68040 as running at twice the speed of its bus or not it's effectively running at the "same IPC", where C==bus clock, as a non-clock-doubled 486.
The UM doesn't break down the clock requirements per instruction
(***** Actually, the thing I linked to is the same users manual you linked to, and the same information is in section 10. Use your link, it's not a terrible scan. To quote it now that I can copy-paste:
The instruction timings are based on the following suppositions unless otherwise noted:
1. All timings are related to BCLK cycles and are for BR = An or suppressed. For BR =
PC, 1 and 1Lclocks to the <ea> calculate and execution times unless otherwise
noted. For memory indirect postindexed with suppressed index — ([bd,BR],Xn) or
([bd,BR],Xn,od) with Xn suppressed — times are the same as for memory indirect
preindexed with suppressed index — ([bd,BR,Xn]) or ([bd,BR,Xn],od) with Xn
suppressed.
The word "PCLK" appears nowhere in section 10, and therefore no instruction timings are in PCLKs.)
In general you can make benchmark results convey whatever you want, depending on which tests were run and how optimized the tests were for specific hardware.
I'm not saying that the 68040 and 80486 necessarily "ran at the same speed", there are plenty of benchmarks out there that suggest that the 68040 was faster in the real world at least some of the time. (Again, though, you rapidly fall into a deep, deep rabbit hole with arguments about whether contemporary benchmark X is valid because reasons, etc.) It may well do a *lot* of things faster than the 486, we all know that counting Mhz is a terrible way of comparing different CPUs to each other. But I still think it's fair to throw a flag on that whole "clock doubled" claim, for two reasons:
1: Motorola never rated the CPUs based on their PCLK input, and:
2: Apple didn't start calling the 68040 a "66/33mhz" CPU until after the DX2 came out; They slapped that designation on the low-end Quadras and Powerbooks that were competing against genuinely clock-doubled 486s and it misleadingly makes it look like those computers have a different CPU than the original "33mhz" Quadras, which any benchmark will show you is not true. In other words, it was a disingenuous marketing ploy. If the 68040 is indeed faster than its "rated" speed vs. a 486 the correct course of action would have been to do the whole "Mhz Myth" thing they later invented for the G4.
Ask any Commodore fanatic and they'll talk your ear off about how the 1mhz 6502 in a 64 is "faster" than the 4.77mhz 8088 in an IBM PC, and they'll have a leg to stand on because the 6502 can execute some of the simplest of its (relatively small repertoire of) instructions in... 2? clock cycles while it takes an 8088 something like 8-11 cycles to do anything. A better way to talk about CPU performance is instructions per second, of course, but that's misleading because it matters muchly what instructions you're talking about. (The 8088 has a much larger instruction set than the 6502 and it *can* do some operations faster with a single instruction than the equivalent loop of instructions for a 6502.) If you want to say the 68040 is "more efficient" than the 80486 based on instruction counts or whatever that's legit. But that "clock doubling" thing is completely a red herring.
That sort of thing is well outside the scope of this thread, though; we've derailed it slightly.
That is indeed true. I just get riled up when people mention that "clock doubling" thing.
