iMac G3 (Rev A -> C) G4 CPU Upgrade

[Bunsen]

I want to say thankyou too for your thorough photographic and textual documentation of the process here, max1zzz

 

[trag]

Been a while but I thought the iMac processor card had cache chips on it. If so, wouldn't that be limiting the speed?

Depends on whether he's clocking it up by increasing the bus speed, or by increasing the multiplier.  The "proper" method in this case would be to keep the iMac's original bus speed and increase the G4's clock speed by increasing the clock multiplier.  With the original bus speed, the cache chips would see no difference.  I would not be surprised at all if the iMac has little or no head room for bus speed changes.

Very cool work, BTW.  Breathtaking.  Which is kind of weird to say about soldering,  but what the h---, it just is.

Hmmm, could one take an old G3 ZIF and replace the vanilla 750 with a 750FX or GX and remove the cache chips?  Probably not, because the L2 is internal on the FX and GX, so the pinouts are probably different.  It sure would be nice to increase the supply of 1 GHz G3 upgrades with L2 cache running at full CPU speed...  We could design new ZIF boards easily enough, but that darn pin grid array header was impossible to find the last time I looked for it.  OTH, we didn't have Ali Express back then.

Hmmm.  It might be worth comparing the pinout of the 750FX/GX to the pinout of the 603/740 though.   If a 740 would be an improvement, then a 750GX with 1 MB of internal L2 cache running at 1 GHz would be just the ticket.  20X bus multiplier for the win....

Voltage regulation is typically by an adjustable regulator whose level is set by two resistors.  Not always, but that's normal.  It shouldn't be too difficult to find the Vreg but it might not be on the CPU card.  It is not, in the Beige G3.

 

[trag]

Answering my own question, the 750FX and 750GX have a different ball grid than the 740, so no chance of a swap there.  It also appears that IBM has gotten out of the PPC750 business and passed it along to Rochester.  Sold their big foundries (actually paid them to take them) to GlobalFoundries.  And their website pretends that they've never heard of PPC.  Irritating.

Also rereading the postings from Max1zzz it appears he was changing the bus multiplier.  Very puzzling that that didn't work, unless he got all the soldering perfect, except the pins that control the bus multiplier...   Is it possible that the G4 uses the bus multiplier pins in a different order or with different setting values than the G3 did?  So maybe when you think you're setting 466 it's actually 566 or some such?

 

[max1zzz]

I'm overclocking it by changing the multiplier, so the cache should not be a problem

I have just had a look the the card and can't see anything that looks like a voltage regulator so it may be on the logicboard and not the card.

It's possible the multiplier pins could be different on the G4 but I suspect they are the same as 333mhz and 400mhz where the same positions for bot the G4 and G3.

Edit, Just tried 433mhz with no luck, So it looks like 400mhz is the max I can get the card to without other modifications

 

[Gorgonops]

I suspect the problem is the Cache RAM. According to the PPC750 datasheet the private cache bus can run at anywhere between a 1x and 3x divisor of the core CPU clock, and the choice of divisor is made in software, not hardware, when the CPU is initialized. I don't know what the iMac's initial setting was (it's probably documented somewhere) or if it's staticly set for all the speeds (233-333mhz) the system was originally sold at or if the firmware adjusts the divisor based on bus clock multiplier, but in either case my suspicion would be that when you clock the G4 higher than 400mhz the cache RAM bus is ending up running too fast.

But that's just a guess.

 

[trag]

It sounds like chasing down the Vreg is your best bet in this case. In the Beige G3 Apple used a voltage regulator module on a seperate plug-in card. It was a little complex because it received a signal from the ZIF CPU module telling it what voltage to set. The signal was just controlled by resistors installed or not installed on the ZIF module, so it's just a pins-tied-high/low kind of thing. I don't know what the iMac used though.

Okay, did a search on iMac overvoltage and found a thread on Macbidouille. Those whacky French guys found the voltage controlled by a cs5158 chip (16 pin SOIC) on the underside of the logic board. But, I think they were looking at a later dalmation iMac. The cs5158 is a programable voltage controller. Instead of the simple ratio between two resistors arrangement I mentioned earlier (older tech) this newer controller checks the bias on five pins (1, 2, 3, 4, and 6) and sets the voltage accordingly. I guess that gives one 32 settings. They found it fixed at 1.3V rather than taking the pin bias from the CPU card, although their multimeter probing may have been flawed.

 

[Gorgonops]

To follow up on the cache theory: I know several accelerator vendors distributed "Cache control panels" to help users fiddle with the setting of their G3 ZIFs, might it be worth trying them to see what divisor the cache SRAM is set at? I guarantee that if Apple used a fixed 1/2-core ratio the original chips aren't going to be good for 433+mhz.

 

[max1zzz]

You might be right, if i'm reading the data sheet of the cache chips correctly they are rated for about 150mhz, if we assumed the best case and the chips are running at 1/3 of the cpu clock 433mhz should *just* work in theory, but it's so close it's reasonable to assume it might be the problem. On this theory 400mhz is comfortably in the range the chips can do, 466mhz and 500mhz are way out

So, perhaps without swapping the cache chips 400mhz is the max - maybe i'll just have to swap the chips and see

 

[max1zzz]

Well something bad just happened, only i'm not sure what.... Just tried to solder new cache chips on (stolen from a dead powerbook G4) Decided to do it the quick way and just plonk the new chips on and heat them up (rather than applying new solder. After I stopped heating there were several loud pops and the chip wasn't sitting flat. i assumed I had popcorned either the chip or the board, but both look fine. So i'm not sure what popped and why the chip wasn't sitting flat at the end.

Think i'm just going to clean them up and try soldering them down again Thew worst that can happen is it just won't work.

 

[max1zzz]

Well, Think i'm gonna order new chips and solder them in properly. But that will have to wait as I screwed up licensing the FTP software on my server and just had to fork out $200 to rectify it, So that's eaten up my project budget for now....

Might swap a G4 onto one of my other cards though so I can keep playing around with it

 

[techknight]

the 2300 and 5300 use TQFP processors. 

Those things are a PITA to change compared to BGA, I remember doing a countless amount of BGA rework back in the xbox and PS3 repair days.

 

[trag]

I was wrong when I wrote that the cache should be fine if the bus speed stayed the same. I forgot that the cache speed keys off of the CPU speed, not the bus speed. It's been a long time since I dealt with the finer points of overclocking chips with backside cache.

So given my earlier blunder, I hesitate to mention this, but is it not the case that the cache isn't even active until the cache control extension/CP loads?. My memory recalls that the external backside cache is configured and activated by the CPU at some point in the boot sequence. If that is the case, the cache speed still shouldn't affect whether the machine boots. It would just cause fatal errors partway through the process.

 

[Gorgonops]

I would imagine on a machine that has firmware that natively understands the installed CPU enough to know about the cache control registers it would probably set it up before an os loads... But that said, I sort of wonder if it is possible to override the default divisor set at boot by modifying a structure in NVRAM, possibly via an Open Firmware command. That may well be how the cache control panels for ZIFs work.

 

[max1zzz]

Well it should be quite easy to test when the the cache is set up, if iplonk my cache-less card back into the iMac it should start booting if the cache is set up by the OS (but will then probably fail), if it is set up by the firmware it simply won't boot whatever I set the CPU multiplier to

Edit, it doesn't boot without cache, however I have a horrible feeling I have killed the G4 trying to solder the cache chips last night...

 

[Gorgonops]

For laughs I was looking for the relevant developer notes to try to figure out what the divisor *should* be for iMacs of different CPU speeds, but so far I've run into conflicting information. The Developer Note for the original 233mhz model says it runs it at the 2:1 divisor, IE, 117mhz, but that note *only* covers the 233, not the faster models. Meanwhile the note for the first slot-loaders (350/400mhz) says it's set at 5:2 for both of them, which if true would have it running at between 140 and 160mhz. Low End Mac's profile of the 333mhz iMac says it also uses 5:2, which would equal 133mhz, while wikipedia and everymac.com claims it's set to 2:1 like the original model, which would have it running at 166mhz. By any chance does System Profiler tell you what it's set at?

Here's a thread that has a link to Powerlogic's old "Cache Profiler" software for OS 9, maybe see if that can tell you? It would be interesting to determine once and for all if it's the same regardless of CPU speed (IE, move the jumpers and see if it changes as the speed increases) or if it's just hard set in the iMac.

 

[techknight]

the "popcorning" is caused by moisture stuck inside the chips plastic epoxy or the PCB itself. 

Any time you want to properly rework a board, you have to pre-bake the chips and the PCB to drive any moisture out so it avoids that problem. Popcorning usually results in instant death. Anytime I had a GPU popcorn on a 360, it was done. 

 

[max1zzz]

Yep, never had a popcorned chip work again. Just kinda pissed that I popcorned the CPU and not the SRAM....

I'm gonna order now SRAM chips for that board and give one last go before putting a new chip on the board as i'm not 100% sure if it popcorned or not (i'm not seeing any obvious blisters on the chip, but there is one section that dosen't seem quite flat.)

Edit: I'm thinking of using these as the replacement SRAM chips http://uk.farnell.com/cypress-semiconductor/cy7c1347g-133axc/sram-4mbit-parallel-4ns-100tqfp/dp/2115424They look to be compatible with the originals, but are twice the capacity and can run at faster speeds. I'm not sure if the iMac could use any more L2 cache without further modification, but I can't find any 2mbit chips anyway

 

[techknight]

The popcorn happens underneath the IC in the BGA ball area and shorts out connections. That happens alot... I had a Sonnet L2 G3 500Mhz and a CPU swap on that did the same thing

 

[max1zzz]

oh damn.... Guess I'll just start with a new card then....

I was assuming it was the chip as that what I always used to popcorn on the xbox's.... I'll try and be more careful next time

 

[techknight]

Those chips are ceramic, they usually dont popcorn. the PCB however....