I wasn't analyzing how fast of an FPGA it would need (I'm actually clueless on that front). I was analyzing why a microcontroller would be a bad idea and an FPGA would probably be required. The FPGA will have an easier time catching the hardware signals on the bus saying "a write happened" or "a read was requested". A microcontroller running at the high clock rate of 100 MHz would still be pretty stressed at high data rates just handling the accesses and decoding the addresses, while an FPGA should be perfectly capable of handling it -- that's what my big write-up was about.The Iici (and the other computers) have a 25mHz bus and a MC68030 CPU. Why can they read perfectly fine to/from ROM/RAM/CPU/HDD, but we need a 100 MHz FPGA to do the same? I've never seen a 3rd party add-on card that needs a FPGA with a MHz ratio of 4:1 to the host computer to work before(??). I'm not sure if I understand this.
Is it possible that the microcontroller can handle it? Maybe -- definitely not in the ROM SIMM slot because there's no mechanism for the card to slow down read accesses to it, but it might work in a PDS slot where the PDS card has to acknowledge that a read has completed as I'm seeing with bbraun's latest hardware work. But with the idea of a ROM SIMM card with a microcontroller in it, I'm just saying that a microcontroller is a bad idea and an FPGA is the way to go.