Overclocking 604 Processor Cards

[cobalt60]

Just bridge R2 with solder, leave the clock alone and it should start at 270MHz. It's only a 12.5% overclock, so will likely work fine.

I'm actually putting it into my 7300, but I am happy to hear you think 270MHz will be fine. I have 48MHz and 50MHz crystals, so I could:
240/48
250/50
264/48
275/50

 

[Phipli]

I'm actually putting it into my 7300, but I am happy to hear you think 270MHz will be fine. I have 48MHz and 50MHz crystals, so I could:
240/48
250/50
264/48
275/50

As long as the pinout is the same.

You'll possibly also be exceeding apple's rating for the CPU in that case / PSU combo. I'd possibly consider adding the second fan that case design takes if it doesn't have one already, and perhaps avoid too many spinning hard disks and PCI cards. Sure it will be fine though heat wise, I've done worse.

You might want to confirm the slot compatibility though, because that might be an expensive mistake these days. Not as cheap as it used to be.

 

[Melkhior]

Just bridge R2 with solder, leave the clock alone and it should start at 270MHz. It's only a 12.5% overclock, so will likely work fine.

How do you get to that conclusion? I see that patch as an underclock...

Looking at it, R1-R4 are either open or closed by 0 ohm, so I suppose R5-R8 are pull-ups or pull-downs and the optional R1-R4 invert the value.
Assuming they are in order for PPL_CFG[0:3] or PLL_CFG[3:0] and depending is they are active-high or active-low, the value is either 'b0101 or 'b1010. Those would be either 6.5x or 4x, and 6.5x produces values way too high with the usual bus in those machine, so we can assume it's 'b1010 and 4x. I think we're in agreement on that.
However, R2 would be either bit 1 or 2 - changing R2 would produce 'b1110 or 'b1000. The first option is 3.5x so would underclock (safe), and the second one is 3x (even more underclocked, probably also safe, though unlisted as the bus speed is likely too low).

(I didn't look at the 604e datasheet in details so would have missed something).

 

[cobalt60]

As long as the pinout is the same.

according to one article online, you can not use an Apple card in a Power Center, and tho the article doesnt outright say it, it looks like you can use a Power Center card in an Apple.

"The Catalyst architecture requires the DTRTY line from the CPU. As none of Apple's upgradable systems require this line, it was left unimplemented in Apple's CPU card designs. To provide support for the Catalyst design, Power has implemented the DTRTY line on unutilized and compatible pins on Apple's original CPU card design."

<b>Apple CPU upgrade cards and PowerCenter systems: a bad combo

<b>Apple CPU upgrade cards and PowerCenter systems: a bad combo

www.cnet.com

 

[Phipli]

How do you get to that conclusion? I see that patch as an underclock...

Looking at it, R1-R4 are either open or closed by 0 ohm, so I suppose R5-R8 are pull-ups or pull-downs and the optional R1-R4 invert the value.
Assuming they are in order for PPL_CFG[0:3] or PLL_CFG[3:0] and depending is they are active-high or active-low, the value is either 'b0101 or 'b1010. Those would be either 6.5x or 4x, and 6.5x produces values way too high with the usual bus in those machine, so we can assume it's 'b1010 and 4x. I think we're in agreement on that.
However, R2 would be either bit 1 or 2 - changing R2 would produce 'b1110 or 'b1000. The first option is 3.5x so would underclock (safe), and the second one is 3x (even more underclocked, probably also safe, though unlisted as the bus speed is likely too low).

(I didn't look at the 604e datasheet in details so would have missed something).

You're correct, it's just me suffering from a silly form of dysnumeracy, I often read things backwards and did in this case. I saw 0111 as 1110.

So the 4.5x I was aiming for needs R1 moving to R2 and R4 bridging with solder. @cobalt60

 

[cobalt60]

we can assume it's 'b1010 and 4x

R1 moving to R2 and R4 bridging with solder

I believe you are mistaken about what the 1s and 0s represent. Sorry if I misunderstood you or am incorrect in this conclusion, still working this out, and my ability to understand what people are trying to say is often lacking. I believe a 1 indicates no jumper, and a 0 indicates a yes jumper (solder bridge). If you follow the link in my sig, you will see I ran into this before when reading PowerPC datasheets, and it threw me off way back in 2005. If anyone has found something contradictory to be true, please do share.

I also think on this PowerComputing card, the order is reversed.
So:
R1 = CFG3
R2 = CFG2
R3 = CFG1
R4 = CFG0

I replaced the 60MHz oscillator with a 50MHz one. With the stock resistor configuration, my 7300 booted at 200MHz on a 50MHz bus (4X). For the following examples, lets assume an "X" means bridged, and a "-" means no bridge

First I tried
R1 X
R2 X
R3 X
R4 -
Booted at 150MHz (3X)

I then accidentally tried:
R1 -
R2 X
R3 -
R4 -
black screen (I believe this is 300MHz, 6X)

I then tried what I meant to:
R1 -
R2 -
R3 X
R4 -
250MHz (5X)

Pretty happy with this. Might try for 264MHz and 275MHz.

 

[Phipli]

you follow the link in my sig, you will see I ran into this before when reading PowerPC datasheets, and it threw me off way back in 2005. If anyone has found something contradictory to be true, please do share.

This isn't to do with the datasheets, it's because we're having to 50:50 guess the polarity of a potential divider. It's to do with not having the board in our hands to use a continuity tester.

Glad you worked it out

 

[Melkhior]

I believe a 1 indicates no jumper, and a 0 indicates a yes jumper (solder bridge).

Make sense. With the notation I used, that means R1:R4 represents PLL_CFG[3:0], and if we presume active-high, R5-R8 are pull-ups (so the active-high values default to 1) and R1-R5 are used to ground the values to 0. Should be easy to confirm if the resistors are connected to ground or +VCC.
And 'b1010 (4x) becomes 'b1000 (3x) when R2 causes the inversion of the second lowest bit, which is what you observe.