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Quadra 605/LC475: "EViL RAS LINE HACK" revisited . . .

...

While I'll admit there's moments when it can be a little difficult to follow some of these threads because of their... sometimes scattershot nature, overall I appreciate bait being thrown out there for technical discussions. Even the ones that end up as little more than a trip down a rabbit hole and never produce anything particularly actionable can at least trigger some... non-linear thinking that pays off later.
Thanks, the Yin of it is that I tend to "see" connections visually between seemingly unrelated things that more verbal folks don't. The Yang of it is that I have trouble verbalizing what I see so that they'r comprehensible .

About the only negative thing I'd say here is the opening could have been a little clearer about whether this is a thing that was actually pulled off at some point and was lost to history, or if this was a (potential) cul-de-sac that was vaguely discussed at some point but never went anywhere.
You quoted me above as having said it was done around 2005 in the second post. That was mistaken, it was probably done more like 2003 or earlier using ribbon cable wired up between SIMMs and jumpers from the mobo soldered up in a horrible fashion, which led dr. bob say something on the order of  "That is just evil!"

(And greater specifics about *where* it was discussed would obviously be useful. And, also, for instance, you open with a reference to "that 2012 SIMM recreation thread"... by all means feel free to include links to the supporting material you think are relevant so anyone who might be interested in joining can more easily figure out the backstory?)
Was looking to post this pic:

SIMMspender00.jpg

(which didn't work yesterday) that I had uploaded to this thread:





I was trying to get a topic posted before work, asking about possible availability of MicroQuadra schematics in the hopes of getting a quick reply. Maybe I should go back to using my "Random Questions thread for such?

If we could work on the clarity and grounding just a *little* it might make the ideas in the threads more accessible, and therefore actionable? (And thus possibly goosing the completion rate a bit?) Just tossing that out there as a maybe a nice-to-have.
Thanks, I think that was what 360Alaska meant as well. It was late, I took it badly, however I did wait until morning to reply.

Anyway... back on topic, I guess?

Just tossing this out there: do you know for sure it's the RAS lines that are unique between the SIMM socket and the onboard memory? I only ask because I went to my go-to  "DRAM memory for Dummies" schematic (IE, the Dynamic Board Commodore PET schematics) and in that case it's the CAS lines that are separate between the two memory banks, RAS are paralleled. I'm scratching my head a little as I read this to try to figure out if it would matter on a 72 pin SIMM which you had in parallel and which were separate, and... okay, this sentence: "Driving RAS without CAS is probably ok too, but the chip will consume its active current (approx 1000 times the idle)" makes me think you're probably right, it's RAS they separate. Maybe that didn't matter with 4116s. :p

I mean, in principle this seems like a potentially easy hack as long as the ROM in the system can actually grok the idea that there's more than X much memory in the bank allocated to the onboard RAM and the rest of the data/address lines are all wired in parallel between the motherboard socket and the RAM bank. The other thing that maybe be worth mentioning: a 128MB SIMM is a dual-banked; according to the document I linked above when you're using a 72 pin SIMM in a 32 bit configuration each bank uses 2 of the four RAS lines. Since the 605 only has 4MB soldered on the board, which is presumably all one bank, I kind of wonder if ultimately you'd be limited to 192MB, not 256, because the memory controller might not have a fourth set of RAS lines. (IE, the RAM controller only supports 3 total banks, not four.) I have no answer to that in a vacuum.
Yep, the RAS lines "address" the columns implemented in memory across banks in the Macs I've looked into. That's why I object to "soldered" standard memory as a mechanism for laming low to midrange Macs. Soldered minimal RAM configs limit the machine to a pittance on just one of two or less than the four available banks of any given controller. I can't imagine Apple spending the money to develop a "Three Bank" memory controller when all they had to do was limit the memory addressing hardware implementations on all but the high end Macs and use the same controller unbridled on the chosen few.

IIsi with 64MB limit for Bank B and lamed to 1MB in Bank A using the same controller as the 128MB IIci and also SE/30 (with an earlier controller?) would be the prime example.

Memory for the LC was limited to 10MB in ROM as an insurmountable barrier. My God, you might be able to have a competitive memory allocation on a low end Mac!  :eek:

Using a 72-pin SIMMplus type card as roughly shown in the pic above might place a pair of 128MB SIMMS above the depopulated memory IC pads parallel to the mobo in the low profile MicroQuadra cases. It's an insane hack, almost nobody would really want to jumper RAS lines from the mobo pads or even worse, unimplemented address lines (used as CAS) AND unimplemented RAS lines from the legs of the memory controller  .  .  .  but what the heck?

Maybe I should start this over in a new thread? This one has been well and truly derailed.

I have recently been concentrating on completing just TWO of my many current projects for now, but I'll still be posting my Hack Concept Threads.  [;)]

 
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Some members only ever post any topic at all in the lounge! Now THAT is objectionable.
I'm so sorry if anyone took this other than as I intended. It's taken me a day to realize just how badly this was worded. I absolutely did not mean to imply that I have any objection at all to folks who might only participate in lounge discussions or post only appropriate lounge threads. Heck, some members may never post any topic of their own at all, participating in discussions anywhere here is a great thing. We've been about community from the beginnings of the MLA/SNITZ era.

Back on topic: has anyone ever seen a schematic of the Q605/475 or any info at all on MEMCjr architecture?

Q605-Block_Diagram.JPG

 
Here's another thread that's relevant to this, although this one actually works. (IE, this is an on-the-site link, not a pointer to archive.org's wayback.)
 



The interesting post is Trag essentially repeating the same information (IE, the claim that he did get a 260MB configuration to work with *zero modifications* in a SIMM doubler; I'm highly curious how that could of worked based on what little I know about how 72 pin SIMMs are *supposed* to work, there's just not enough address lines), and also pointing out that if one *were* to rip out the onboard RAM to substitute something bigger you'd need to find another RAS line in order to get more than 64 MB, IE:

I can't imagine Apple spending the money to develop a "Three Bank" memory controller
Well, the first response is "why wouldn't they?", because the MEMCjr controller was specifically developed for low spec computers there's nothing to say they wouldn't gimp a chip on the silicon core level, and the second response is simply that even if the chip has another set of RAS lines coming out of it because they're unused they may well simply be terminated onto the motherboard in such a way that it's less than trivial to free them up. If someone actually has the datasheet for this part and has leaked it onto the Internet it seems to be pretty darn well hidden.

 
Dunno, I said it's easy to lame a more capable part at the logic board level, that's what Apple did in the IIsi. It has the same controller as the IIci and it's lamed by soldering a measly 1MB of RAM to the board in the same way the 605 is lamed. The additional Address/CAS lines and RAS lines of the MDU are documented probably terminated on the board.

MDU is a QFP with legs that can be lifted and A/B gated to jumper wires and back to the mobo. If MEMCjr could U3 in the 605 we might snooker the system in that same manner. But U3 in the QFP package (like MDU) is almost certainly Prime Time. Only U19 has enough pins to do MEMCjr's tasks and the pitch of its legs/pads are just stupid small to be messing about on that board.

Computer numbers for stuff like memory controllers seem to me to go from 2 to 4 to 8, so 3 would be odd. [;)]

 
Read what I say and stop jumping twisting it around to suit your insulting ASSUmptions.
OK

Now the Lounge is out in the open, right in registered members faces and clogged with ON TOPIC threads that are supposed to be posted out in the proper fora for lurkers to see and so be enticed to register. Some members only ever post any topic at all in the lounge! Now THAT is objectionable.
I see. You can use the report function to make suggestions that threads be moved. We get those kinds of reports from time to time and when we do, we move the thread to the right forum, leave the 30-day shadow topic in the old forum, and make a post in the thread mentioning we did it.

Even still, we are getting a lot of members onboard who aren't used to the world of classic web forums. For as different as it looks, this forum software is conceptually the same as the Snitz installation we had then the forum was founded. Almost everything else on the modern Internet works pretty differently, and I suspect many people aren't used to the idea of subforums.

It's an honest mistake that gets made. When we notice, we make corrections to classification. The report tool is the best way to make us notice, since not every one of us clicks on every thread in the forum.

Interestingly, you write all the time about using the centralized new content feed for the whole site, so from that particular perspective, all the content is in one big list anyway. I wonder how many people use the site that way. 

The other thing that this software has that our previous forum software didn't is a global "Create" button which asks you to select a forum. News & General and Lounge are the first ones there, which probably explains why so many things from people who are less than totally familiar with forum conventions ends up in those two spots.

Seems fair enough, given that this reads like a personal slam against anyone/everyone who's current headspace in relation to this hobby is "I like chatting with other people who have similar interests despite the fact that I'm not actively pursuing said interests at the moment".
Indeed, I had misread it as an indictment against anybody who wasn't here doing hardware hacking.

If indeed the issue is threads end up in the wrong place, just report them.

The great thing about reports is anyone can click on that little button and it notifies the mods and admins.

 
Memory for the LC was limited to 10MB in ROM as an insurmountable barrier. My God, you might be able to have a competitive memory allocation on a low end Mac!
How dare Apple not build a $2500 Mac with a memory limit competitive with a $25,000 workstation.

Notably, in 1989, the Sun 3/80 and the new high end Sun SPARCstation 1 boasted RAM ceilings of 16 megs - in the UNIX workstation market of $10,000 or more. The 286es with which the LC was directly competitive with PCs that had 4-meg RAM ceilings, many of which shipped with 512k of RAM. (Yes, I know that the LC was announced in 1990, not 1989, it's just that I have a BYTE from May 1989 handy, and not one from October 1990.)

 
The 286es with which the LC was directly competitive with PCs that had 4-meg RAM ceilings, many of which shipped with 512k of RAM.
Strictly speaking 286s have a ~15MB-ish limit. (The CPU is limited to 24 bit addressing and there's a couple chunks of address space occupied by ROMs.) But, yeah, many 286 motherboards only had sockets for 4MB, or at most 8MB, onboard. You could expand to the full amount using an ISA slot but RAM in a slot would in most cases be slower. By 1990 the LC was probably more directly competing with 386SX machines... but that actually doesn't change much, because most 386sx motherboards used identical chips and layouts as 286 motherboards.

(I guess if I really wanted to be pedantic I could point out that by 1990 the LIM/EMS 4.0 memory standard had been ratified which theoretically would let you stick almost 48MB of RAM in a 286, IE, 32MB of paged EMS memory plus the 16MB of directly mapped conventional/extended RAM, but nobody in their right mind would do this.)

But, yes, 10MB was a perfectly reasonable limit by contemporary standards.

 
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Just for reference, I have a 128MB SIMM from an old SUN server in my Performa 475.

It's more than I need. I saw it by chance for $50 on eBay and snapped it up.

I've lots of other goodies in there too and overheating may be a concern, but it all runs fine, most of the time.

 
I admit that I only looked at one ad in that particular issue of BYTE. As I mentioned, it's a few months ahead of the actual LC launch.

I took a closer look and I see I've missed a few details.

The ad I happened to see is for an ultra-budget brand (ZEOS) however. There's the whole "Apple prices vs. real street prices" issue in the '90s, but the 286 I saw was around $1400 and a bit closer to the LC's price, there's a 386SX (they say 4MB onboard, 16MB total) and for $3000 there's a regular 386 with a much more straightforward 16MB limit.

A more ad-heavy or PC-hardware-focused magazine would probably show some more close comparisons.

Of course the other thing is Apple has almost never sold to people who look at specs and then do some weird algebra to figure out how many kilobytes of ram and disk and how many cpu clock cycles they're getting per dollar and then determine the "best deal" on that alone.

Windows 2 would have been available this time and 3 became available in 1990, so depending on when you look, you're looking at the Mac LC vs. a DOS PC. This was in the era when Apple advertised heavily based on needing to add a bunch of things to a machine to get a graphical interface running on it, and even then it's pretty widely agreed Windows 3 wasn't even good until 3.1, in March 1992.

If there's interest, I can look at a more timely PC magazine to make some better comparisons, but ultimately, even the Mac was limited compared to a theoretical total on a PC, 10 megs was pretty much fine through the mid '90s as far as running normal desktop Mac software on system 6 and 7 would've gone. Apple was shipping systems with 8 until almost 1996.

 
The interesting post is Trag essentially repeating the same information (IE, the claim that he did get a 260MB configuration to work with *zero modifications* in a SIMM doubler; I'm highly curious how that could of worked based on what little I know about how 72 pin SIMMs are *supposed* to work, there's just not enough address lines),


I'm curious too, but I've never been curious enough to dig the SIMM doubler back out of the attic, where it has resided lo these many years.

The only way it could work, in theory, is if the Q605 actually supplies 4 independent RAS lines to the SIMM socket.   There must be at least two independent RAS lines, because many folks have verified that 2-bank 128 MB (and 32 MB for that matter) SIMMs work in the Q605.    If the Q605 has four independent RAS lines in the SIMM socket, then the SIMM doubler could be splitting them two per SIMM, which would be enough to address the total of four 64 MB banks on two 128 MB SIMMs.

This is a lengthy, but fundamental discussion of the issues but in reference to the X100 machines.

Macgurus Memory Terms Defined

Shorter but similar discussion:

Macgurus - real maximum memory

BTW, one other important detail is that the 72 pin SIMM has 4 pins devoted to RAS.  So 4 independent RAS lines are possible, although rare.

 
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The ad I happened to see is for an ultra-budget brand (ZEOS) however. There's the whole "Apple prices vs. real street prices" issue in the '90s, but the 286 I saw was around $1400 and a bit closer to the LC's price, there's a 386SX (they say 4MB onboard, 16MB total) and for $3000 there's a regular 386 with a much more straightforward 16MB limit.
I don't know if I'd call Zeos an "ultra budget" brand; they were actually one of the top tier vendors when it came to mail-order PCs. (In at least the same category as Dell was at the time.)

In any case, the debut price of the LC was listed as "$2499". I was digging around to try to find out what that came with and I found this helpful article. (*) Apparently that was for the 2MB/40MB drive configuration, without a monitor, and at the time they *guessed* that the street price for that would be around $1,800. In September 1990 ZEOS's ad in PC Mag  the minimum price for a ZEOS 386sx with a 40MB hard drive was $1395, but that's with 512k and a mono monitor. The price for a complete system with color VGA monitor and 2MB RAM was $2,195, which is about square with what you'd pay to add a generic (non-Apple) monitor to your $1,800 LC. So, yeah, they're very comparable...

But getting back to ZEOS' status as a "bargain basement" vendor, well, Here's an outfit called "Swan" that's selling a full 386/25 for about the same price as ZEOS' 16mhz 386, and Gateway's 386sx 2/40 setup with VGA was about $200 cheaper than Zeos. If you're willing to go with the *really* generic white-page ads in the back of the magazine it looks like you could get the street price of a 386sx16/2/40MB with color monitor down to about $1700. So... yeah, I'm not sure I'd go with ZEOS as the benchmark.

Another thing to remember around this time is that RAM cost some pretty serious scratch, north of $100 a MB. Maxing out an LC would cost almost half again what the whole computer cost.

(* Edit: Of course, what this article *really* makes clear is how crazy expensive the IIci and IIfx were. The IIfx at a street price of $6600 is $1,600 more than ZEOS' EISA 486.)

 
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BTW, one other important detail is that the 72 pin SIMM has 4 pins devoted to RAS.  So 4 independent RAS lines are possible, although rare.
Yeah, but the question here is is, if the *standard* is to use two RAS lines per 32 bit wide bank (IE, the theory documentation I've seen says that from a RAS-line perspective 72 pin SIMMs could be thought of as two parallel 16 bit banks of RAM, each connected to its own RAS) how would the computer detect and therefore know how that for this particular SIMM (doubler configuration) to use a single RAS line to drive *each* 16 "mega-address" by 32bit (vs 16 bit) bank? Is this something the Presence Detect lines can communicate?

(Or does the RAM controller do some cut-and-try to figure this out when it initializes, IE, does it try writing and reading back values with different combinations of RAS set to see how many it has to set to get a full word?)

 
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I admit that I only looked at one ad in that particular issue of BYTE. As I mentioned, it's a few months ahead of the actual LC launch.
Oh, I missed this. The LC launched in October 1990, so May 1989 would be almost a year and a half out. Prices changed a lot in that interim. The 386sx in particular debuted at a ridiculous price premium compared to the 286. That had *mostly* gone away by about a year later, in large part because the prices of full 386s had also fallen off a cliff.

 
I'll ignore all the rambling about what's on topic and what's off topic and assume that on topic means anything referring to a RAS hack for Quadra 605 / Performa 475 motherboards.

The djMEMC in the Quadras 610, 650 and 800 supports up to ten banks of memory, each being up to 64 megs. This means a Quadra 800, for instance, can have 520 megabytes with 128 meg SIMMs (assuming 8 megabytes on the motherboard). This requires a ROM change (or requires running NetBSD).

The MEMCjr in the Quadra 605 (and Performa 475) supports at least four banks. There'd be no sense in designing a memory controller that had an odd number of banks, and we know it already supports three (4 meg on the motherboard is one bank, and SIMM slot is two more), so a minimum of four is a reasonable assumption.

What we really want and need to know:

  1. Does the memory controller support more than four? How many in total? Someone needs to disassemble the memory initialization routines in the Q605 ROMs.
  2. What's the pinout of the memory controller, and which pins are already routed?
I'd love to have 260 or 516 megabytes in a Quadra 605. I have a Quadra 610 with 264 megabytes, and it certainly helps when compiling modern software, but when it comes to a compact, tidy system that fits easily in a 1U case, the Quadra 605 is really the most desirable.

 
What we really want and need to know:

  1. Does the memory controller support more than four? How many in total? Someone needs to disassemble the memory initialization routines in the Q605 ROMs.
  2. What's the pinout of the memory controller, and which pins are already routed?


If someone has a Q605 board and a continuity meter handy, it would be simple, but slightly tedious, matter to put a probe on one of the RAS pins in the SIMM socket (identify from 72 pin SIMM standard pinout) and then run the other probe around the MEMCjr chip until a connection is found.  Repeat for other three SIMM RAS's.    Then do the same for the RAS pin(s) in the built-in RAM (use datasheet for RAM chips to identify RAS pin).

This will not identify any unused, but pinned out, RAS lines, but it will determine whether the MEMCjr has at least 5 RAS lines, which I strongly suspect must be true.

 
With any luck MEMCjr is a superset of MDU and its I/O setup is similar. Apple grouped CAS, RAS and Address lines for the two memory banks of the IIci and IIsi together very neatly.

BankX-BankY-000.jpg

I'm WAG'n that the layout of the logic board will look something like this:

temp-PDF-GAMMA-101.jpg

View attachment temp-PDF-GAMMA-101.pdf

I'd be very surprised if we find less than eight RAS lines grouped all in a row on MEMCjt, almost certainly no less than six.

 
How dare Apple not build a $2500 Mac with a memory limit competitive with a $25,000 workstation.
Get real already. Damn straight how dare Apple intentionally lame the LC at 10MB. That wasnot competitive at all in late 1990 as compared to "garage level clones" that took off like a bat outta hell when Windows 3.0 shipped.

Besides, your sarcastic response to my sarcasm about RoadAppling gets us nowhere.  [;)]

I bought Win3.0 on its 5/22/90 release date. I had my CorelDraw 2.1 box sitting next to a Paper White VGA monitor on top of the low profile case of the 386sx/16/socketed CoPro/SCSI Card/80MB Seagate SCSI HDD, 4MB RAM, 3.5 and 5.25 FDD machine I built for about $1,350 Most of the hardware costs are on a spreadsheet printout I pulled from my filing cabinet just now..  Not much later  I upgraded it to 16MB for $608.50. Granted I penny pinched every single component from the pages of Computer Shopper whereas name brands were a lot more money.

My makeshift CorelDraw production machine cost me $500 less than LC list even discounting the 4->16MB upgrade that sidelined $180 worth of memory. Memory cost wasn't terrible in 1990 as compared to when I took my Rocket from 8MB to 32MB later on.

 
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Get real already. Damn straight how dare Apple intentionally lame the LC at 10MB! Not competitive at all in late 1990 as compared to "garage level clones" that took off like a bat outta hell when Windows 3.0 shipped.
If the LC is meant to compare to a 386sx then, yes, it's competitive, and nothing you said counters that. 386SX boards typically maxed out at either 8MB or 16MB, 10MB is exactly in the middle of those two numbers. (And remember, the 386SX CPU has only 24 address lines so 16MB is the absolute ceiling. It was also pretty common for full 386 PCs to have an effective 16MB ceiling because they'd be equipped with DMA hardware ripped straight out of an AT.)

Also, if you want to nitpick RAM prices, fine: I got that $100 for a 1MB SIMM from one ad. According to this the going rate in October 1990 was more like $59 a megabyte. So I was off by $40. That's still expensive. Going to the back pages of that MacWorld magazine I linked to I see 2mb of RAM kits (IE, two 30 pin SIMMs) going for $130 (which about jives with that low of $59), but a set of 4MB SIMMs for a Mac IIx/cx/ci is listed at a whopping $1,725. (At that time in particular the densest RAM on the market ran at a pretty major price premium compared to the same amount of RAM in a smaller size.) That's $431 a SIMM, and cross-checking that with the ads in the back of that Sept. 1990 PC MAG and a December 1990 BYTE that looks like a reasonable price. (In the December magazine cheapest printed price I could easily find was $365.) So, actually, for the SIMMs you needed to max out an LC upon its introduction the RAM alone would be around $800, IE, $100 a MB, or a short stone's throw from half the anticipated street price of around ~$1,800 for the whole machine.

(Also note you get to keep the 2MB soldered on the board, unlike you would if you bought a 2-socket 8MB-ceiling 386SX board. That's something?)
 

Yes, the LC was an intentionally crippled entry-level system that Apple had to intentionally create because Motorola didn't make a CPU like the 386SX that would let them build an "honestly" brain-dead little computer. Is there a point to being angry about it? I mean, heck, PC cloners would still sell you an 8088-based system in 1990 if you really wanted it; Apple had the Classic for that market, was that an evil thing for them to do too?

 
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Yep, as someone who had to scrape for every penny for the Mac equipment budget back in the day I think It's forgivable for me to complain a bit! [;)] Thankfully I got to splurge now and then when my partner realized what we really needed. CorelDraw and that pimped out budget 386SX was a necessity until Illustrator and Freehand caught up to Corel's commanding lead.

I really wish I had a Computer Shopper from 1990. I'm not nitpicking RAM prices, just going with what I've got printed out here. I guess I'll call it even given my homebuilt graphics machine price vs. what I'd probably find from the likes of Bus Computer a few blocks uptown for a mail order system. We probably paid a around $2,000 for a 386DX/25/4MB/210MB with a color VGA monitor from them for a different business in late 1990, but that's though.

That 10MB ceiling strikes me as odd, but Apple FINALLY shipped a Mac with enough RAM to run System 7 out of the box when they rolled out the LC! YAY! No sarcasm there, shipping systems like IIci and IIsi with only 1MB when I was running 4MB in my SE seemed ridiculous to me at the time. That Scully & Co. had crippled the original Mac to 128K RoadApple status right out of the starting gate still rubs me the wrong way. The Mac was designed to be better than that.

The LC discussion seems relevant to this thread after all. Apple apparently screwed up in reigning the Quadra 605 back to 4MB and a single SIMM in their hardware/firmware implementation! Probably an oversight because they didn't really expect the 605/475 to have much in the way of legs.

 
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