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G3 B&W schematics

There is many reference to the alternate ROM, too. It's possible to insert a special ROM stick into one of the SDRAM slot to boot with an external ROM.

Oh wow, that's very cool! I had forgotten about that explanation in that doc. Nice find!

This schematic really does reveal all of the pin mappings for the ROM. PDF page 13 shows that the DIMM 0 socket has some pins that are NCs on the other sockets:
  • 109 = RGRAR(1)
  • 108 = RGRAR(2)
  • 106 = RGRAR(3)
  • 105 = RGRAR(4)
  • 25 = RGRAR(5)
  • 24 = RGRAR(6)
  • 22 = RGRAR(7)
  • 21 = RGRAR(8)
  • 48 = RPPWR
  • 50 = ROMWE*
  • 51 = RGRKLROMOE*
  • 52 = EMROMCS*
  • 53 = EMROMLED*
  • 61 = ROMSELEM*
And then PDF page 15 shows how the ROMSELEM* signal is what is used to select which ROM to use.

So on the flash chip itself, the /CS pin will be EMROMCS*, /OE will be RGRKLROMOE*, /WE will be ROMWE*, and then I'm assuming you just grab the address and data signals from the corresponding RAM socket signals, in addition to RGRAR(8:1) for some address lines that I assume wouldn't otherwise be available in that socket's standard pinout. I haven't pored through the schematic in depth to confirm. Looks like there's an output for a little LED to put on the ROM stick too. RPPWR appears to be for providing VPP which wouldn't be necessary on newer chips.

There are jumpers on the logic board for choosing voltages that go to the flash chip: whether VPP is 12V (R926) or 5V (R927), and whether VCC is 5V (R244) or 3.3V (R243). There are also some jumpers for enabling writes to the onboard ROM at all, as well as the bottom boot block.

That would be a fun little project, a recovery ROM DIMM to test out that functionality. Since the ROM is already flashable in-system it's not as useful as the custom ROM SIMMs on the older models, but it would be very useful to have as a recovery method if someone accidentally bricks their logic board while customizing the ROM.

I wonder how many later models also had this capability?
 
I know if you go through the G4 DA schematics it mentions a connector for an "external" ROM flash, a life-boat connector of sorts

Ah yes, thanks for pointing that out! Looks like it uses whatever connector J26 is, looks like some kind of PCI thing. I wonder if it survived through to the final board revision. On the iMac G4 it looks like they may have brought it out to the AirPort card slot.
 
Another fun fact: Heathrow (I/O chip for Gossamer) and Paddington (I/O Chip for Yosemite, Yikes, Columbus, and a few of the PBG3s), are seemingly pin compatible. Reading both schematics, I don't see any differences, so assuming they're the same BGA footprint, one would technically work in place of the other. Of course, the Ethernet needs to be rewired on Gossamer to take advantage of the extra lines for 100BaseT, and the ROM would need significant editing, but it is theoretically possible to swap them.
 
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