Farallon ETHERMAC LC NSC w/NuBus drivers in the SE/30 PDS?

[Trash80toHP_Mini]

Looks like a simple columnar transposition cipher with a length of 40. Thehe order of rows in the wrap map would be cyphertext, making the connections consistent within the map and correct IRL. So at least the center column is wired correctly.

Best case: columns remained consistent + no rewiring necessary

Worst case: managed to transpose the columns as well when I reoriented connections -  need to flip-flop connections of rows A and B = 2/3 of what I thought necessary last night.

May look at it again tonight as the brain's boggled  .  .  .  more so than usual anyway. :blink:

 

[maceffects]

I wish I had knowledge of the signals so that I could assist in checking.  Unfortunately, it is certainly outside my wheelhouse.  I hope some other people knowledgeable can chime in on this.  I found a SE prototyping board I picked up, that if we get this signal map working, I'll try my hand at it to save you the burden of having a repeat with the SE version.  It is certainly tedious and stressful, until it works...  Then its like a rush of emotions. 

Keep us posted, and in the mean time if there is anything I can do to help.  Please let me know.

 

[Trash80toHP_Mini]

It's not really all that tedious or stressful to tell the truth, once you get going it's a bit relaxing. Wire wrapping takes some time, but it's an eminently flexible way of doing development work. It's made for unwrapping connections for modifications to the board, swapping different size packages for smaller or larger ICs or even ripping up wide swaths of a bus to make it connect however/wherever. One of the reasons for the loopy even lengths of the wires is to allow for such mods.

If becomes apparent that logic needs to be interposed between the two buses like in the case of the PAL on a PowerCache adapter, we're all set up for that. Just install wire wrap socket(s) for IC(s) on the connector side in line with the address jumper block along the handy center gap between connectors. Snip lines that need re-routing to the logic in the appropriate places, strip them, wrap connections to the logic and it's on to the next battery of tests.

Got a couple of days off to play with it if I get the chance. Crash Wednesday is the treat at the end of the tough stretch of my rotation. []

 

[Trash80toHP_Mini]

View attachment 27483

Yellow = NC

Pink = 20 Address lines connected to ASIC

All connections made on Key side next to connector and on side indicated by arrow.

Pin 1 should be at dot near logo on ASIC

Eyes aren't tracking well enough to do pinout and don't trust ability to do TXT listing ATM. Check column and row designations for possible error. :blink:

edit: first pic I posted was missing A17  .  .  .  :

 

[Trash80toHP_Mini]

A1

A2

A3

A4

A5

A6

A7

A8

A9

A10

A11

A12

A13

A14

A15

A16

A20

A21

A22

A31

 

[Bolle]

Card is running in 24bit mode all the time, that's a good thing to start with.

Means only flipping one bit makes the host think it's talking to slot A instead of E while the card is thinking it's still in slot E.

We don't have to worry about checking if the card is in 24bit or 32bit mode to invert address bits accordingly.

 

[Trash80toHP_Mini]

Sweet, that's progress! Could you tell just from the lines involved? Inverter on board or simple connection swapping? Sounds like I can implement it sans logic in a wrap swap?

If inverter, I need a DIP part number so I can order up a wire wrap socket to keep things neat. May have one in hand or I can do the nasty by looping the wrap wires thru the perf for soldertail with IC on wrap side.

Still wondering about the /SLOTIRQ and NMRQ thing vs. /IRQ1-3 on the target machines?

 

[Trash80toHP_Mini]

IIsi DevNote:

The major difference between the
Macintosh IIsi computer and other Macintosh II–family computers is
that the Macintosh IIsi computer has only one NuBus slot which is
mapped to geographic address $9.

It would have been too good to be true if that adapter had been Slot $A per the above. Any chance of getting the NIC to think it's in $9 instead of $A if needs be?

 

[Bolle]

Gotta invert A22 to get it into slot space $A.

For $9 you'll have to invert A20, A21, A22.

A 74LS04 will do either job.

 

[Trash80toHP_Mini]

Cool, I can do both if we use a gate IC with it and a jumper, no? Is the 04 tri-stated and capable of doing same with a single three header jumper swap w/o gate? Alternate single IC solution?

 

[Bolle]

74LS125 will allow 3-stating the outputs.

 

[Trash80toHP_Mini]

Dynamite! I've got 16 and 20 pin soldertail sockets on hand I can make work, but I'll see about getting the real deal in the right pincount for wrapping. []

edit: done, 14pin wire wrap sockets, 5 pieces here by Monday for $8.66 shipped. If you can do the circuit diagram, I can get the wrap map/trace layout done for pasting on the board (hopefully without another FUBAR incident) while sourcing the ICs. That will cover up the Bog forsaken mess on the board and it'll be a pleasure to do a full multilevel wrap instead of a fugly 3/4 level wrap on the soldertail connector pins.

 

[Bolle]

I would suggest you still try a straight through wiring at first just to see what happens.

The ASIC might be aware of different slot IDs (if I had to guess I would say the ID is set by jumpers/resistors connected to the pins that would go to the slot ID pins on the Nubus slot if the ASIC was installed on a Nubus card)

The more universal approach would be to implement the inverted address lines to allow other cards to work as well.

 

[Trash80toHP_Mini]

I'm with you all the way there. Baby steps, that's why we're in wire wrap mode. I've been anticipating the need to interpose logical operations for the hack. Implementation is much farther down the road if and when. But for nine bucks the infrastructure for wrapping connections to those ICs and the jumper will be put in place as I go. []

Still haven't looked at columnar transposition error on the wrap map, but having buzzed the address lines on the NIC for you I think I may have a handle on testing column integrity by having the NIC's ASIC in circuit for the buzz.

 

[Trash80toHP_Mini]

I considered just installing one (or more) of my 28pin Wire Wrap sockets right from the start but decided against it. I have matching IDC ribbon cable connectors from back in the day as well for use as component carriers for wire loom a/o dead bug IC carrier swaps, but outside of leaving just enough room, just in case, I held off. A pair of dedicated 14pin sockets is far more elegant now that we know we probably won't be needing anything more complicated than that. []

 

[Trash80toHP_Mini]

When I screw something up I take it all the way over the top!  :approve:   I got the legend down exactly right, row numbers and the column designations both.

It's a simple columnar transposition just like I thought, but not the numbers, it's  every  single  signal  that was transposed. :lol: I gotta laugh, shaking my head just doesn't quite say it  .  .  .

 

[Trash80toHP_Mini]

No such luck, it was rotated 180 degrees! : I think maybe one +5V connection was right, but I'm probably wrong there as well. New worksheet for the map, even corrected the keying as seen from the solder/wrap side of the connectors  .  .  .  maybe.



View attachment LC-030-Worksheet-02-001.PDF

 

[Bolle]

Grab an LC logicboard to actually verify things.

I get this stuff mixed up all the time swapping rows and columns.

Siome of the DIN connectors that come with the built in library in Eagle for example have rows swapped. You would think that A meets A, B meets B and C meets C when male and female plug into each other.

Well, no :tongue:  Not in all cases at least.

Took some time looking at cards and logicboards and what happens when they plug together  until I got my own little library of connectors that fit the way like things are described in Apples documentation.

 

[Trash80toHP_Mini]

Good idea, but the LC side is abundantly clear given the physical constraints and obvious orientation. Glad I'm not alone. I'm used to the rows flip flopping between PDS and Passthru thruholes and again from component side to solder side. This is the first time I've mucked anything up this badly as far as prototyping goes, but the stuff I've done IRL is not to be believed! :

I'm liking the key pasteup I did for buzzing the address lines for you, shoulda' come up with that one ages ago. [:I]

 

[Trash80toHP_Mini]

Been poking around in the datasheets. The two jumper, two state setup of IIsi/SE/30 cards suggests use of another IC to me?