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Very nice! As people have noted, the keyboard is a Mac 128K/512K keyboard; the Mac Plus one had a numeric keypad. Having said that, I prefer the 65% type keyboard, I wish Apple had kept it as the standard format rather than going through the extended keyboard fetish in order to copy PCs. The...

A P5200 is just a P6200 with more swivel. :ROFLMAO: @David Cook I think the app as it currently is (or how you've modified it) is worth testing on the P6200 and P630 to see what the results are, if it's no inconvenience to get them out. Given that DRAM is so much slower than cache, I'm not yet...

Of course, didn't think of that, though normally I do use --x or ++x for that reason. It's odd though, because surely a sequence like: move.l regACount,0(a0) subs.l #1,regACount move.l regACount,4(a0) subs.l #1,regACount move.l regACount,8(a0) subs.l #1,regACount could be generated by a...

@Phipli , @zigzagjoe , @noglin , [at] anyone else with a 630/5200/6200 or comparable era Mac. I've updated the tests to include RMW tests, which operate on whole words to add the current loop countdown to a given word. I think that's as valid as operating on bytes. I removed the 4 Sets test...

And finally, the 68K version! These are the results I get for that: For 68K version running on my PB1400, I get slower results. TestTicks/LoopTicksRemCountBandwidth (MB/s) L13640287155626710886467108864*4/1048576/((87+(36402-15562)/36402)/60)=175MB/s I've just included the normal L1...

For your delight, I've updated the very crude app to support writing directly to the framebuffer. I did it by dereferencing the Pixmap handle from the CGrafPtr for screenbits. This version of the app should therefore work with a P6200 and if recompiled, for a P630...

Hi folks, OK, I've written the test application. It's not very big. Source code and application are included. The results take a bit of interpreting. My PB1400c is a 603e Mac (as we all know). So, it has a 4-way x 16kB, Write-back L1 Cache. It also has a 128kB L2, Write-Through cache. So, I...

Yves Lempereur wrote MacASM, an integrated editor/macro assembler. It was the first self-hosted Mac Development environment and it's tiny, about 25kB. Its integrated environment is un-Mac, instead like editing BASIC on a Commodore 64, complete with line numbers, a BASIC style command line. OTOH...

It's a real privilege to hear from you. You might regret the number of questions this prompts me to ask, but here goes: Firstly, are you saying that the 'C' compiler was Hippo 'C' or Consulair (or something else)? Secondly, why wouldn't it have been possible to develop with MDS or MacASM as they...

I'm certainly making some assumptions, because I too, don't have a P5200/6200 and I'm only an embedded firmware engineer. But I think maybe I wasn't clear enough in my earlier comment too. Other people have suggested there were extra wait states because they figured the '040 bus ran at 33MHz...

Sorry, yes, I meant 1 transaction at a time.

Dev notes say the CPU bus runs at a 37.5MHz, but it doesn't say how fast the '040 bus runs. Various contributors here have said maybe there's an extra wait state to take it down to 33MHz. Yet I'm sure I've seen a document on how '040 bus transactions work. Maybe it was on the '040 document...

@Phipli : I checked the compiler options for my Code Warrior Gold 11 (Academic) to see how they differ from yours. And indeed there are fewer options: As you can see, only the PPC601, 603 and 604 were supported at the time (I picked it up in late 1996), not the 603e, 604e and 750. This is one...

It turns out I have a sonic PcCard ethernet adapter that should work with my PB1400c too. I'll try it and provide an update!

https://68kmla.org/bb/threads/fantasy-m88100-macs.46869/post-525482 Indeed. So, on a 6100, video is in DRAM. So, that means that area of DRAM gets marked as non-cacheable. On a 6200, the frame buffer is 1MB of DRAM behind Valkyrie, which can store up to 4x transactions. So, to properly resolve...

( @Phipli ) it adds up, but there are a few reasons why I don't think that's the cause. Firstly, there are no Read-Modify-Write memory instructions on a PowerPC, just load and store. So, this sequence of bus cycles in non-cached DRAM would have to be implemented in software, not the Capella...

Last bit first. Bits have been covered, but not in the detail you say. Oooh! Don't know how to test that. I tested the main fuse, which was OK. The discolouration seems to start a bit after the first section. OK, I don't have a capacitor tester. Naïvely I thought an ordinary Multimeter would...