Only issue is of course getting the A23 (for hacking no issues, but for "series" more so.
You are right, it might be an issue for an end user to add a flying wire from PDS to ROM slot.
To avoid that another solution came into my mind:
How about creating missing additional address lines from a latch (no additional wires outside of ROM needed):
- In read cycle read entire 8MB address space using A0-A22
- In write cycle if A21=1 do not write ROM but data to a latch (at least 2 bit)
- In write cycle if A21=0 write to ROM using A0-A20 from computer and A21+A22 from latch
All data can be read from a continuous 8MB block.
ROM need to be written in 4 x 2MB blocks
Entire ROM can be written out of upper 4MB block (A22=1)
Some additional logic on ROM SIMM needed.
No additional wires from somewhere else needed
Custom made "in system programming" code needed.
Will need custom software to be written in an external programmer.
Do you think this might work?