Oh I am still here monitoring everything
I started buzzing out my accelerator as well. Did not get too far yet.
Accelerator itself:
A1-A23 on PDS/68k connect 1:1 to 030
D0-D15 on PDS/68k connect to D16-D31 on 030
did only look into GAL U6 yet - it is the clock controller and C16M, C8M and the async FPU clock connected
RAM board:
A0-A23 present
A2-A17 connect to the two GALs at U4 and U5 - they serve as address muxes
D0-D15 (D16-D31 on 030) present and hooked up to the two buffers
U7 is the CAS generator - connects to A0,A1,A18,A19,A20,A21
U6 is generating RAS - connects to A15,A17,A18,A19,A20,A21
I will go on with that. I also ordered a logic analyser to play around. Might be put to use on that one to get to know how it works a little bit.