8-o
What a lot of great info Gorgonops! Wow!
Here is the JED2EQN output from that PAL .JED file:
Code:
; JED2EQN -- JEDEC file to Boolean Equations disassembler (Version V063)
; Copyright (c) National Semiconductor Corporation 1990-1993
; Disassembled from IWM.JED. Date: 5-9-112
chip IWM PAL16R6
CLK=1 i2=2 i3=3 i4=4 i5=5 i6=6 i7=7 i8=8 i9=9 GND=10 /OE=11 f12=12
ro13=13 rf14=14 rf15=15 rf16=16 ro17=17 ro18=18 f19=19 VCC=20
equations
/f19 = i2 * /i3
+ /i2 * i3
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
f19.oe = vcc
/ro18 := i5
+ i6
+ i7
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
ro18.oe = OE
/ro17 := i5 * /i6 * /i7
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
ro17.oe = OE
/rf16 := /i4 * /i5 * i6
+ /f19 * /i5 * /rf16 * /i6 * rf15 * rf14
+ f19 * /i5 * /rf16 * /i6 * /rf15 * rf14
+ /i5 * rf16 * /i6 * /rf14
+ i5 * /i6 * i7
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
rf16.oe = OE
/rf15 := rf16 * rf15 * /rf14
+ /rf15 * rf14
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
rf15.oe = OE
/rf14 := rf16 * rf14
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
rf14.oe = OE
/ro13 := /i5 * /i6
+ /i5 * i6 * i7
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
ro13.oe = OE
/f12 = /i8 * /i9
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
+ i2 * /i2 * f19 * /f19 * i9 * /i9 * f12 * /f12
f12.oe = vcc
Here it is manually reduced (just removing the extra ORed lines that are set to always be false):
Code:
/f19 = i2 * /i3 + /i2 * i3
f19.oe = vcc
/ro18 := i5 + i6 + i7
ro18.oe = OE
/ro17 := i5 * /i6 * /i7
ro17.oe = OE
/rf16 := /i4 * /i5 * i6
+ /f19 * /i5 * /rf16 * /i6 * rf15 * rf14
+ f19 * /i5 * /rf16 * /i6 * /rf15 * rf14
+ /i5 * rf16 * /i6 * /rf14
+ i5 * /i6 * i7
rf16.oe = OE
/rf15 := rf16 * rf15 * /rf14 + /rf15 * rf14
rf15.oe = OE
/rf14 := rf16 * rf14
rf14.oe = OE
/ro13 := /i5 * /i6 + /i5 * i6 * i7
ro13.oe = OE
/f12 = /i8 * /i9
f12.oe = vcc
It looks similar to my equations in a somewhat different order, but the most clear proof that it's different is right in the very last line. On the HD20 PAL, f12.oe = OE = i8, not vcc, I tested this directly. The equations themselves may be more similar than they appear, but they appear to use a lot of previous gated states for gated outputs whereas the HD20 doesn't use any that I'm aware of.
The pinout listed in 062-0287-A_Nisha_Drive_Specification_Apr85.pdf is STRIKINGLY similar. To the point where I'm convinced that we have a Rodime pinout now.
I hereby shall use this terminology:
Mac <-(floppy bus)-> IWM Controller <-(Nisha/Rodime bus)-> Nisha/Rodime Controller <--> Disc Drive
Browsing through this document, it has occurred to me that the Nisha controller has no provision for different capacity other than changing IDs returned from a status/diagnostic call. So actual drive capacity must be equated outside of the drive, if it even happens, or it may be assumed that all IWM drives are 20MB in the Mac ROM or something. But the point is that the drive can not directly, specifically specify its own capacity. This document doesn't detail anything having to do with the protocol between the Mac and the IWM controller, it only explains what happens between the IWM controller and the Nisha controller.
It seems that emulating on the Rodime level and reusing the IWM controller is most likely to result in a single 20 MB drive, whereas emulation including the whole IWM controller has greater potential to tweak in more capacity. At the very least, emulation of multiple HD20s is possible if the IWM controller is emulated. The emulator could just abstract multiple emulation via daisy chain to form extra 20MB "partitions".
There are lots of good reasons to focus on emulating the entire HD20, IWM controller and all, but it's good to know that we have some potentially awesome documentation to fall back on if IWM difficulties point us back toward Rodime emulation.