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Reverse Engineering the MacSnap SCSI

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Noticed a few month ago that the 53C80 SCSI Chip is in life production by Zilog, available new :

Mouser link : https://www.mouser.fr/ProductDetail/692-Z53C8003VSG/


COVID helping, I bough a broken MacSnap SCSI on eBay and started to reverse it. I though it will be cool to gave a schematic and understand a little bit how it was done. 

Managed to buzz almost everything and new PCB is almost done (and converted for use with a PLCC SCSI chip).


The board consist of :

- 53C80 SCSI chip

- Custom timer circuit to reset the 53C80

- two PALs


You can find a good article written by @Dog Cow on his blog here :



Here is the reversed schematic :



Currently I've got a few issues :


Resistor Packs

The original board got three resistors packs (~ 150Ω each) wired to each output of the 53C80 chip to the ground. I double checked with the MacPlus diagrams and the Mac Classic Ones, and neither of them have those resistors ladders. Any ideas what they are for ?



What is going on with the two PALs ?

The left PAL looks to be used as an address decoder to generate  /IOR /IOW /DACK and /CS lines and a few other stuff. 


The right one is especially weird. I cannot understand why it's wired that way... It has freaking data lines ! This is straight dark voodoo stuff. Only possibility I came to is that it's used to "live" patch the Mac ROM while running. Is that even possible ?

You can read on the PCB "128k ROM ONLY", so that could be it... 128k ROM as "Mac 128k" or 128k sized ROM (MacPlus) ?


Here is a picture of the board :



I will get a PAL Dumper soon, but my hopes aren't high...

Would creating a new custom PAL be a better idea ? I think creating only /IOR /IOW /DACK and /CS lines should be enough. But we have a limited number of address lines though the ROM socket so that will be tricky.

- /ROMCE should be good for 0x40 0000 to 0x5F FFFF which include SCSI space (0x58 0000 to 0x5F FFFF)

- /CS should need A19:A23 but we only got access to A1:A17

- /DACK don't understand very well what's its for. Looking at the Datasheet, it's used for DMA purposes, but from what I remember, neither the Mac 512k / Plus / SE support DMA.

- A9 + /ROMCE can be used to generate ~IOR and ~IOS, but what about the other ones ?


Let's say ROM data is between 0x40000 and 0x42000, so generate /CS between 0x58 0000 to 0x5F FFFF when /ROMCE is low ?


Other informations

Does anyone have a manual for this board ?


Thanks for your help or input.

Edited by demik
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  • demik changed the title to Reverse Engineering the MacSnap SCSI

Very neat indeed!


If 2020, an otherwise miserable year, brought us anything good, it's a plethora of newly reverse-engineered clones of these otherwise hard to find and very desirable upgrades!



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Ok, some progress:


- after a few lectures, 128k ROM means MacPlus ROM.

- double checked the PALs and there is no clock line, so 90% sure they are combinational. 

- got the Z53C80

- made "new" ROMs using AT27C512R, they works fine : https://www.mouser.fr/ProductDetail/Microchip-Technology-Atmel/AT27C512R-70PU/?qs=lURXKZrvvXfxaNMm462qBA%3D%3D

- since one of the PALs got 14 inputs, I need a logic analyser or two and some other stuff. Bough two of them, waiting for delivery.

- everything is on GitHub now https://github.com/demik/oldworld/tree/master/EDA/MacSnap SCSI

- PCB is finished, I will probably need to check if everything is routed properly and send them for production afterwards.






Todo :

- need to check caps calues. Some caps value seems weird, others seems dead. I will probably 

- The reset timer circuit is strange, not sure if a replacement will be needed or not yet.


Otherwise, I'm stuck waiting for hardware (PAL DUMPER on the way, LA, etc…)

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@demik wow! Very nice work, I’m impressed. Looks like you’re pretty much ready for prototyping. I don’t think clearance will be a problem because the MacSnap processor upgrade was taller IIRC. If you get this working and want to work together on making it a complete set, I can injection mold this plastic part. 


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128K ROM only because the early Mac ROM (64K) did not contain firmware to support SCSI.


IIRC, and I don't remember enough detail, the Mac Plus and previous models, use D1 and D2 in a strange way.  I can't remember what specifically they're used for.    That's probably why the other PAL touches those two.   Unless I'm confusing them with A1 and A2....

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This is awesome! I'm anxious to be one of your first customers or help beta test if desired. My 512K has a MacSnap 548E and Plus ROMs, but I've never been able to track down a real MacSnap SCSI to go with it.

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21 hours ago, Dog Cow said:

Have you verified clearance, that is, head height for the populated board?


Didn't think of that. I will do a dummy PCB to check this, thanks !


21 hours ago, maceffects said:

@demik wow! Very nice work, I’m impressed. Looks like you’re pretty much ready for prototyping. I don’t think clearance will be a problem because the MacSnap processor upgrade was taller IIRC. If you get this working and want to work together on making it a complete set, I can injection mold this plastic part. 



Thanks ! I'm missing the PALs equations for now, and I'm not as skilled with PALs as some other folks around there.


Anyway, I made a few changes to the PCB:

- There is now Internal terminaison power (for SCSI2SD)

- I put a 26 pin IDC header wired to use a LPT header. They are avaible on eBay or Aliexpress for like $3 or $4 bucks. The only thing missing would be the plastic part. Will get back to you when everything is working.


19 hours ago, History_SE30_Dude said:

Those resister packs judging by their location are internal termination, this was common to see on early SCSI cards and would be installed if you were not using an internal drive. 


it makes sense, thanks. Would that make sense on the new board ? Does something like SCSI2SD provide termination ?

I would like to offer the option to enable or disable the termination. Resistors are ~ 143Ω each to ground. Is there something to improve here ?

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On 1/9/2021 at 7:06 PM, maceffects said:

@demik I ordered some of @Kai Robinson 's PAL dump boards and I'll be assembling them soon.  If you want me to send you one let me know.  It seems like if that is the only thing stopping the project, that can be easily solved. 


Thanks ! I've already got two on the way. But the thing is on the MacSnap, one PAL has an output used as an input and the other one has like 14 inputs. Kai's boards only works with 16L8 PALs (8 inputs only)

I will need to build a custom PAL dumper for this... And yeah it's the only thing that's is difficult really


On 1/9/2021 at 4:10 PM, History_SE30_Dude said:

The scsi2sd has termination that can be enabled or disabled in software. I’ve seen it cause issues and I’ve seen it not. If the intent is to have an internal drive then no problem but if you don’t it could cause problems. 


On 1/9/2021 at 3:19 PM, erichelgeson said:

Nice! With a BlueSCSI (arduiscsino) you could probably fit everything right on top (or maybe even on the same board, haha!). I'm interested in trying one out for my 512k.


Thanks both of you for your feedback. I've looked around SCSI specs this week-end and choose this set up :


- the board will provide both active termination and termination power for SCSI2SD and alike. Each one can be disabled if needed.

- to prevent damage to the logic board, termination power will be limited to 5W


The active terminaison should consume less power than the actual passive one, so in theory this should works. I'm still trying to figure which termination power regulator to get as I want to use only new parts on the kit.

There is one (MC34268) still produced, but the current stocks are empty. It's in SOIC-8 format, I plan to put it on a DIP-8 socket adapter so it can be removed if needed.

This one is cool because it was built especially for SCSI terminaison, has short circuit protection, and cost less than $1

Edited by demik
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