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Reverse Engineering the Macintosh SE PCB & Custom Chips for 1:1 reproduction


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I haven't followed this thread as much as I should/would have wanted to so pardon my ignorance, but wouldn't it be possible to design a small daughterboard with a SOIC attiny85 and a 32.768kHz crystal? 

A bit like this:

1212-06.jpg

 

If all we need is to remove the 10/33pF cap, it's not too much of a problem? Again, I haven't taken a good look at the schematics yet so I may be talking nonsense. 

 

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@quorten I think i just noticed something in the original Apple RTC chip....it looks to be a very early implementation of I2C (phillips brought it out in '82) - Rename the pins on the RTC from RTC.CLK to SCL and RTC.DATA to SDA and....well, there you have it...I2C serial data line is BiDirectional after all....would make sense, right?

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Here's what i lifted from the inside macintosh hardware reference books - vol III, it's referencing the Mac 512k/Plus RTC which is only 20 bytes of PRAM, but other than that, the rest of the chip is identical. The 1-sec output doesn't drive a clock, it drives the 65C22's interrupts every second, so not having an exact 1sec output is a no-go. Running the MCU off the external 32.768Khz clock should still be doable, though, it doesn't have to do much 'heavy lifting'. I'm also trying to have a look to see if there's any I2C chips that would work in this config - most seem to have an almost identical pinout, just not more than 64 bytes of EEPROM for PRAM for almsot all of them.

 

The Macintosh real-time clock is a custom chip whose interface lines are available through the
VIA. The clock contains a four-byte counter that's incremented once each second, as well as a
line that can be used by the VIA to generate an interrupt once each second. It also contains 20
bytes of RAM that are powered by a battery when the Macintosh is turned off. These RAM
bytes, called parameter RAM, contain important data that needs to be preserved even when the
system power is not available. The Operating System maintains a copy of parameter RAM that
you can access in low memory. To find out how to use the values in parameter RAM, see chapter
13 of Volume Il.

Accessing the Clock Chip

The clock is accessed through the following bits of VIA data register B (vBase+vBufB):

rTCData		.EQU	0	;real-time clock serial data line
rTCClk		.EQU	1	;real-ti.me clock data-clock line
rTCEnb		.EQU	2	;real-time clock serial enable

These three bits constitute a simple serial interface. The rTCData bit is a bidirectional serial data
line used to send command and data bytes back and forth. The rTCClk bit is a data-clock line,
always driven by the processor (you set it high or low yourself) that regulates the transmission of
the data and command bits. The rTCEnb bit is the serial enable line, which signals the real-time
clock that the processor is about to send it serial commands and data.
To access the clock chip, you must first enable its serial function. To do this, set the serial enable
line (rTCEnb) to 0. Keep the serial enable line ~ow during the entire transaction; if you set it to 1,
you'll abort the transfer.

Warning: Be sure you don't alter any of bits 3-7 of VIA data register B during clock
serial access.

A command can be either a write request or a read request. After the eight bits of a write request,
the clock will expect the next eight bits across the serial data line to be your data for storage into
one of the internal registers of the clock. After receiving the eight bits of a read request, the clock
will respond by putting eight bits of its data on the serial data line. Commands and data are
transferred serially in eight-bit groups over the serial data line, with the high-order bit first and the
low-order bit last.

To send a command to the clock, first set the rTCData bit of VIA data direction register B
(vBase+vDirB) so that the real-time clock's serial data line will be used for output to the clock.
Next, set the rTCClk bit of vBase+vBufB to 0, then set the rTCData bit to the value of the first
(high-order) bit of your data byte. Then raise (set to 1) the data-clock bit (rTCClk). Then lower
the data-clock, set the serial data line to the next bit, and raise the data-clock line again. After the
last bit of your command has been sent in this way, you can either continue by sending your data
byte in the same way (if your command was a write request) or switch to receiving a data byte
from the clock (if your command was a read request).

To receive a byte of data from the clock, you must first send a command that's a read request.
After you've clocked out the last bit of the command, clear the rTCData bit of the data direction
register so that the real-time clock's serial data line can be used for input from the clock; then
lower the data-clock bit (rTCClk) and read the first (high-order) bit of the clock's data byte on the
serial data line. Then raise the data-clock, lower it again, and read the next bit of data. Continue
this until all eight bits are read, then raise the serial enable line (rTCEnb }, disabling the data
transfer.

The following table lists the commands you can send to the clock. A 1 in the high-order bit
makes your command a read request; a 0 in the high-order bit makes your command a write
request. (In this table, "z" is the bit that determines read or write status, and bits marked "a" are
bits whose values depend on what parameter RAM byte you want to address.)

Command byte	Register addressed by the command

z000000l		Seconds register 0 (lowest-order byte)
z0000101		Seconds register 1
z0001001		Seconds register 2
z000l101		Seconds register 3 (highest-order byte)
00110001		Test register (write only)
00110101		Write-protect register (write only)
z010aa01		RAM address 100aa ($10-$13)
zlaaaaOl		RAM address Oaaaa ($00-$0F)

Note that the last two bits of a command byte must always be 01.

If the high-order bit (bit 7) of the write-protect register is set, this prevents writing into any other
register on the clock chip (including parameter RAM). Clearing the bit allows you to change any
values in any registers on the chip. Don't try to read from this register; it's a write-only register.
The two highest-order bits (bits 7 and 6) of the test register are used as device control bits during
testing, and should always be set to 0 during normal operation. Setting them to anything else will
interfere with normal clock counting. Like the write-protect register, this is a write-only register;
don't try to read from it.

All clock data must be sent as full eight-bit bytes, even if only one or two bits are of interest. The
rest of the bits may not matter, but you must send them to the clock or the write will be aborted
when you raise the serial enable line.

It's important to use the proper sequence if you're writing to the clock's seconds registers. If you
write to a given seconds register, there's a chance that the clock may increment the data in the
next higher-order register during the write, causing unpredictable results. To avoid this
possibility, always write to the registers in low-to-high order. Similarly, the clock data may
increment during a read of all four time bytes, which could cause invalid data to be read. To
avoid this, always read the time twice (or until you get the same value twice).

Warning: When you've finished reading from the clock registers, always end by doing a
final write such as setting the write-protect bit. Failure to do this may leave the clock in a
state that will run down the battery more quickly than necessary.

The One-Second Interrupt

The clock also generates a VIA interrupt once each second (if this interrupt is enabled). The
enable status for this interrupt can be read from or written to bit 0 of the VlA's interrupt enable
register (vBase+vIER). When reading the enable register, a 1 bit indicates the interrupt is
enabled, and 0 means it's disabled. Writing $01 to the enable register disables the clock's onesecond
interrupt (without affecting any other interrupts), while writing $81 enables it again. See
chapter 6 of Volume Il for more information about writing your own interrupt handlers.
Warning: Be sure when you write to bit 0 of the VIA's interrupt enable register that you
don't change any of the other bits.

 

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@Kai Robinson It would be really great to use I2C capabilities of the AVR to handle serial communications, that would hopefully speed up serial communications processing enough that a 32.768kHz system clock wouldn't be an issue any longer.  Now I'm looking through the Universal Serial Interface (USI) and it looks promising so far... looks like we need to swap two pins around to get SDA in the right place, unfortunately.  Adapter board and ATTiny87, that's the way to go I guess.

 

Regarding the 1-second interrupt accuracy, 15 minutes of time drift a month (approx. 30.5 days) is 15/43920 = 0.03415% error, I'm guessing 10 times worse would still be acceptable for the interrupts system.  We simply need to know what tolerance range the RTC is required to operate within.

 

Good to see the info from the Hardware Reference, I was looking for that online but couldn't find it.  Everything in the implementation thus far checks out with it, and it adds a few new ideas for writing test cases.

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  • 2 weeks later...

It's amazing what happens in 10 days... i've been having some pretty serious heart issues again (double attack in '18), which has meant that i've been off-work and not really doing anything barring sleeping, for the most part. So i've had the wind knocked out of my sails. Now - i've sent some boards out to the people who volunteered originally - but i've got 2-3 more boards still available, if anyone wants to try building one up. I'm unlikely to be behind a soldering iron again for another few weeks. 

Also @Torbar could i place another order from pe-connectors through you again? Need another 20 SIMM sockets!

 

@quorten re the RTC - can the MCU not run the code at the 32Khz Crystal freq? Also, did you manage to switch the prescaler? :)

Finally, i think i have solved the GLU issue - it's a matter of how the chip was being read as an EEPROM - turns out other people with different chips were using that method and choosing the AM27C020 as well, and getting wacky /OE data...but change to the fairchild 27C020 and voila - the .bin generates something thats easier to analyse.

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8 hours ago, Kai Robinson said:

Also @Torbar could i place another order from pe-connectors through you again? Need another 20 SIMM sockets!

 

For sure.  Just to make sure we're on the same page, 20x of the dual sockets?(so 40 sockets total?) or 10 of the dual sockets(so 20 sockets total?)

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Sorry to hear about your heart troubles. Your health definitely comes first; don’t feel bad about taking care of yourself for a bit, especially considering the crazy amount of progress you’ve already made on this in such a short time. 

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@Kai Robinson The MCU can run at 32kHz, it's just that I wouldn't recommend it without USI, which I haven't implemented yet.  Bit-banging serial is almost certainly too slow at 32kHz clock.  And yeah, there is the other reason I mentioned about the ATTiny85's internal load capacitance invalidating the capacitor selection around the crystal oscillator... but if we're willing to work around that, sure.

 

Yeah, I also haven't been making any changes to this portion in the meantime.  But, sure, I'd see if I could add USI and a compile-time option to select 32kHz clock.  Right now there is compile-time logic to choose only between 8 MHz and 0.4 MHz clock.

 

Hoping for the best for your health.

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20 hours ago, Kai Robinson said:

It's amazing what happens in 10 days... i've been having some pretty serious heart issues again (double attack in '18), which has meant that i've been off-work and not really doing anything barring sleeping, for the most part. So i've had the wind knocked out of my sails. Now - i've sent some boards out to the people who volunteered originally - but i've got 2-3 more boards still available, if anyone wants to try building one up. I'm unlikely to be behind a soldering iron again for another few weeks. 

 

Very sorry to hear this.  I hope things get better for you soon :-(.

 

Board arrived this morning, my internet handle on the parcel amused the postperson... I'll start building it up in a few days when hopefully I'll have a bit more resources in the mental department, or at least time to breathe...

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  • 2 weeks later...
On 10/11/2020 at 4:26 AM, Kai Robinson said:

how is everyone else doing with theirs?

The last couple of weeks have been intense at work and my mental health has been poor so progress has been slower than I like.  I’ve made decent headway on the passives though...

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To show how serious i am about this project...I just bought a working 200MHz, 96 channel logic analyzer from eBay - comes with all 4 Pods, 14/16/18/20 pin DIP analyzer clips, 40 and 48 pin DIP clips and literally every probe going - i even have the floppies in the bag. I've already ordered a Gotek floppy replacement and i have an image of all the disks needed to work it. CRT is crisp as hell, bright, no burn-in. I'm also bidding on a Tektronix Oscilloscope and a hot air station for the SE/30 stuff moving forward. I am 100% COMMITTED to making a working one in the next 12 months, and I have every hope that Rev 1.4c is the final version...

DSC_0292.jpg

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Nice tool! I've read that some of those big logic analysers can understand the processor bus cycles and even do disassembly of captures. Does yours do anything like that?

Edited by paws
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