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  1. @captjon320 Note that the 32.768kHz quartz crystal (approx. 12.5pF load capacitance) is outside the RTC chip, with radial packaging. Based off of my personal anecdotal evidence (for only a single incident, and a wrist watch at that), radial packaged quartz crystals tend to go bad when the bonding on the legs to the quartz crystal inside loosens up, lazy-boy's fix (i.e. me) is to just wiggle around the package until electrical connection is re-established and then glue it to a support to hold it in that position. But of course, the real solution is to solder in a replacement proper.
  2. @Kai Robinson I'm pretty sure the only reason why the Mac Plus inverts the clock signal is because that must have appeared to be the most convenient chip-saving layout. Good to know it is the Sony SND chips that's responsible for generating the power-on-RESET signal. I believe the interesting thing about the RESET signal to the BBU is that it is not actually a chip-level RESET but rather primarily used to reset the overlay bit and a small amount of select other information. The point here is that when you press and hold down the programmer's RESET button, the screen contents do t
  3. Mentioning bodge wire and unconnected traces that shouldn't affect signaling... well that's one thing that old and slow computers are quite a bit more forgiving on! If I've read the schematics correctly, though, the Macintosh SE does in fact use some impedance-matching resistors for certain high frequency signals like the clock lines, RAM RAS, RAM CAS, and RAM WE... so that could be a hint to scrutinize the quality on those lines. @Kai Robinson Alright, I think I have another thought looking at the board photos in detail. I noticed R33A, yes a 47 ohm impedance-matching resistor o
  4. I'd guess probably the most useful thing from @timdorez's tech manuals is the troubleshooting info, seems like the other schematics are largely the same as what currently floating around but always worth taking a more detailed look! Nice find on the Bomarc Macintosh SE schematic... macintoshrepository.org is a pain to deal with and yeah it's understood that the Bomarc schematics didn't make it out to public on good terms, but... well, it's info that can be digested into a schematic redraw under better terms, in a different style and format. I'll probably get around to doing full s
  5. The idea is to go for a flat-panel that caters to the traditional market served by PVM (Professional Video Monitor) CRTs, so you might search around for "security" or "industrial" monitors. Such displays have separate sync signals for RGB component video and are probably more forgiving to imperfect sync signals than consumer LCDs with VGA input. I thought that there might have existed some monitors that can take 5V signals directly, but in case that's not possible you could use voltage conversion circuits too. Here's one somewhat representative option I've found after much search
  6. How about something like the Walk-a-Mac? TTL-input video flat-panel displays are available under the names of "security monitor" or similar, then you just need a logic NOT chip to get the proper input video signals.
  7. @Kai Robinson Interesting idea on setting up the layout of the data. Probably the circuit board footprint of the BBU's socket would be generally more useful when working with the hardware, though (of course not much different). I would recommend sticking to the Apple terminology that I've used in my bbu_pinout.csv pin listing because the Bomarc terminology isn't accurate for the RAM CAS pins on the SE logic board configurations. (If you read the fine print, that is.)
  8. Interesting, I have to say I was somewhat surprised at first to hear that New-Old-Stock apple custom ICs are actually a thing. But I'm guessing it makes sense if you think a bit deeper... Apple may have been planning on making extras on the assumption that their techs might do precise, minimal component repairs (didn't really turn out that way in the field), so that's one thing. And then in their financial troubles in the '90's, maybe they closed a (secretive) deal to sell off their inventory of obsolete components to a Chinese no-name. Well, that's my guesses on how NOS ended up
  9. No problem @maceffects, probably better that your meandering mind touches some points before other's do. Good to have the discussion, as long as we do not feel things are getting too chatty/cluttered here. Almost anything is possible with bank switching. The main limit is really what can be done with unmodified versions of Mac OS and the "user-mode" software developed for it. But, the bigger point, sometimes "one more feature" here is really asking for an SE/30. We'll get there.
  10. @maceffects It's also useful to reflect upon Brainstorm's historic business model, which was to first reverse engineer the Macintosh Plus PALs and then use that knowledge to create the Macintosh SE BBU replacement. I'd reckon that method on its own must have created pretty good results. As far as reverse engineering the Brainstorm is concerned, most of our efforts should really just be focused on analysing the software of the embedded 68k processor on the PDS. I'd guess the Brainstrom BBU is not an FPGA and has no firmware of its own and the firmware upgrade only goes toward the embedded 68
  11. @CharlesT The BBU has an internal soft switch for the ROM Overlay signal, which remaps the ROM to address zero on reset, and the RAM is likewise remapped. It is disabled on the first regular ROM access.
  12. @maceffects Sure, my GitHub repository for my leg of the project seeks to be a useful reference repository that links to all the pertinent information. A lot of the essential information should be copied in and covered there. I'll be updating it with a few more links shortly but it is pretty comprehensive so far. https://github.com/quorten/macsehw @asicsolutions It would probably be a good idea for you to head on over to hardware/fpga/bbu/test_mac128pal.v in my GitHub repository and play around simulating what I have there. That will give you a good glimpse of how th
  13. @Kai Robinson Honestly I think much of the new interest here needs to spend some time to review some of the existing documentation we have before we can get much progress on a zoom call. Really, there's not much hidden info remaining after my analysis thus far, I just feel that no one has yet taken the time to look at and play around with my work-in-progress. But yeah, after some prep-work to get us together into a more cohesive team, I'd be in for a call.
  14. It really isn't hard to adapt the original BBU design to support a 16 MHz CPU. I'd guess the purpose of the drivers is primarily to support a soft switch for "turbo" in case you want to run at the normal speed. I must admit that the back side of that PDS circuit board is quite funny looking, though. @Kai Robinson @maceffects If you looked at the Unitron's PAL equations closely, reverse engineering non-registered PALs is not as easy as you'd think. There's nothing that prevents a PAL equation designer from referencing the same output in its input equations, and in fact Burrell's
  15. The problem could be that RESET is not held for long enough for the processor's internal state to stabilize. According to the MC68000 User's Manual, page 10-12, note 4: "For power-up, the MC68000 must be held in the reset state for 100 ms to allow stabilization of on-chip circuitry. After the system is powered up, #56 refers to the minimum pulse width required to reset the processor." Specification #56 indicates that during a normal operational state after power-on, a RESET only needs to be held for 10 clock cycles (1.25 microseconds). Did you try pressing the programm
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