Jump to content
beachycove

Quadra 950 and the IIfx architecture

Recommended Posts

I just found a statement in another thread from Sept 4, 2019 (statement was by user IIfx), and rather than necro-thread it, I thought I would bring it up separately: "The Quadra 950 is ... solid like a rock; main difference between 950 and 800 architecture is how the 950 grew out of the IIfx system architecture and has the I/O co-processors and memory management architecture. The Quadra 800 is more conventional."

 

Is anyone able to comment on the claim here concerning the 950 as successor to the IIfx? I had not been aware of any connection, but if this statement is correct, my 950 just got more interesting.

 

Original thread: https://68kmla.org/forums/index.php?app=forums&module=forums&controller=topic&id=57863&page=2&tab=comments#comment-617894

 

Edited by beachycove

Share this post


Link to post
Share on other sites

Well, the type of SIMMS used are very different (64-pin as against 30-pin) and this memory allowed overlapping read/write cycles. Furthermore, the IIfx requires 2 batteries, the 950 only 1.

Share this post


Link to post
Share on other sites

The Quadra 900 Developer Note has interesting relevant info on this:

http://mirror.informatimago.com/next/developer.apple.com/documentation/Hardware/Developer_Notes/Macintosh_CPUs-68K_Desktop/Mac_Quadra_900.pdf


“The I/O bus in the Macintosh Quadra 900 computer is similar to the I/O bus in the Macintosh IIfx computer. The I/O bus in the Macintosh Quadra 900 computer runs at a clock rate of 15.6672 MHz. The controller ICs that are connected to the I/O bus include new custom ICs along with ICs originally designed for the Macintosh IIfx, such as the IOPs.”

Share this post


Link to post
Share on other sites

I suppose the question would be, what difference would this make on a 68040 over against a 68030 processor? Or between the Q950 and Q700? Smoother serial and floppy operations only?

Share this post


Link to post
Share on other sites

It doesn't matter if they're running on an '030 or '040: basically the legacy IIfx IO chips are intelligent to the point where they can do a number of things without the CPU micromanaging them, which allows the CPU to keep working on other tasks while serial transfers or disk activities were happening in the background. The most basic chips didn't require reworking for the new '040 bus but the memory, video, and NuBus controllers were revamped to work with the new bus protocols. In the case of the Q700, it received none of the IIfx/Q900 IO chips, but the RBV of the IIci was scrapped and it received basically the same video chip as the Q900 with its dedicated VRAM SIMMs. The Q650 shared many of the Q700's chips, though arguably the 650 was a better machine in that it was faster, with an extra NuBus slot and a built-in CDROM, but the downside was that you got the ugly case.

 

If you compare a Q900 and Q700 for basic software benchmarks (CPU, FPU, RAM, video), there isn't going to be a huge difference. However, if you're also running IOPs in the background and/or are benchmarking IOPs, the Q900 will clearly outperform the Q700. 

 

In a nutshell: the IIfx IO chips help you get data into and out of your Mac faster but that's about it; if you're just doodling on a local file in Illustrator they're not really doing anything for you until you try to move that file somewhere else.

Share this post


Link to post
Share on other sites

My understanding is that on the Mac OS, Apple never took advantage of the IOPs in the IIfx, and just put them in pass-through mode so that operations to the 53C80 and 85C30 were just like on any other macintosh, except that the signals happened to pass through those microcontrollers.   Reportedly, A/UX did make use of the IOPs.

 

Does the Mac OS make use of the IOPs on the Q900/Q950?   

 

Were they some kind of 7805 variant?

Share this post


Link to post
Share on other sites

On my IIfx and Q950, the 'Serial Switch' control panel will enable a 'Faster' setting and a 'Compatible' setting in Mac OS. It could still be an over-simplistic method of engaging the IOPs, similarly to how the A/ROSE methodology allowed for complex co-processing, but in reality was only really implemented with memory move operations to reduce the number of interrupts the 030 directly deals with. There's still a dramatic difference when the 030 is under load while A/ROSE is utilized, despite this simplified implementation. Similarly, perhaps when data is relayed to the IOPs, the 030 is able to move to the next instruction faster than if it needed to control the serial directly.

 

I know A/UX is absolutely required to make use of the SCSI DMA onboard the IIfx and available with the WGS95 Pisces card, so it would make sense if A/UX also gave the IOPs more thorough attention.

Share this post


Link to post
Share on other sites

When the 900 was being developed, its internal codename was IIex. My guess is that it was a "fast, enhanced, extended Mac II" if you follow the naming logic. Given its size and position in the lineup, it's very reasonable to think of the IIfx as the starting point for the design.

 

Interestingly, the 700 was code-named IIce. Note the "c" and similarity to the IIcx/IIci. A "compact, enhanced Mac II" perhaps?

Share this post


Link to post
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now

×