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Macintosh SE/30 Schematics (modernization effort)

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10 hours ago, trag said:

Even with identical pairs, it would be the equivalent of "composite" SIMMs.   A little messy logically.

That's one reason why a pair of 64MB SIMMs, one per bank have replaced pairs of 32MB SIMMS for each bank in my related project. Combining a pair of 32MB or a quartet of 16MB SIMMs to fill a single 72pin slot was a thing, that's for yet another research project. Those boards really don't seem all that logically messy  .  .  .  but what do I know. ::)

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7 hours ago, Trash80toHP_Mini said:

That's one reason why a pair of 64MB SIMMs, one per bank have replaced pairs of 32MB SIMMS for each bank in my related project. Combining a pair of 32MB or a quartet of 16MB SIMMs to fill a single 72pin slot was a thing, that's for yet another research project. Those boards really don't seem all that logically messy  .  .  .  but what do I know. ::)

One 128 meg SIMM would give you two banks of 64 megs, with less fuss.

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Haven't looked at 128MB as my target machines are IIsi and Quadra 950 which have discrete 64MB banks along with the SE/30's pair of such banks. IIRC, the last I looked I could get a pair of 64MB SIMMs for less than a single 128MB SIMM, has that changed?

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I would also recommend redesigning the battery circuit to use a safer chemistry. The chemistry that the 3.6 volt lithium batteries use is extremely toxic in addition to being corrosive.

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It would be very cool to have a replacement board for battery bombed systems. I just decided to give up on one today after days of debug. In all cases I've seen the custom ASICs look to be salvageable.  Populating a replacement board would be much faster than going down the rabbit hole of trace repair. 

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On 5/15/2020 at 3:36 PM, elemenoh said:

What do these asterisks (or are they bullets?) on the sheet labels mean? Inversion?

 

Screen Shot 2020-05-15 at 1.23.01 PM.png

 

I didn't see this answered earlier, I apologize if I'm blind. Asterisks like that usually mean "active low". (IE, the line is pulled to zero to activate the named function. This is usually the case for chip selects. Not universally so, but usually, because TTL process chips in particular tend to float to "1" if they're left disconnected so it's the slightly safer choice.) Another common convention is to put a /slash in front of the name.

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Another thing I'd love to see on a new board, is a separate crystal for the FPU. On the main system, I believe a lot of things are hanging on the same crystal oscillator, thus the FPU can't easily be replaced with a faster one with its own crystal to run asynchronous, which I believe should be possible if it is given its own. Would it add a lot of performance? No, but, it's the benchmark bragging rights you get, and parts and space wise I don't think a crystal, its caps and the traces should take up much space at all.

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Thank you very much for creating this schematic. I will be using it extensively over the next few days to troubleshoot a sound issue on my SE/30! The Apple schematic was readable, but working through the blur of it added an extra layer to the cognitive challenge of buzzing traces.

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Yep, saw that one and it too is fab. I was thinking about a side to side scrolling single page with connections continuous across what are now discrete pages with tagged connections. That's what I did on paper using prints of the IIsi schematic. I could trace my way across the folded map, following traces from section to section from one end to the other.

 

If you can't do it easily in your PCB package, I can probably do it from your PDF pages in Illustrator, or someone else might pick up the gauntlet?

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Are the postscript paths and text exported into the PDFs from KiCAD or are they mere bitmap exports. If the former it's a piece of cake for me in AI, if the latter I may still be able to do it, but what a PITA!

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