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italux

Sonnet Quaddoubler project

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Looking for a Quaddoubler at a decent price...now here is the caveat. I want to destroy it.......in the interest of reverse engineering one and then being able to get them at a decent price. Many cards have been reversed engineered in Amiga land and this would be a very beneficial one for the Amiga and Mac side

 

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To cast the net a bit wider, the 50 MHz Newer Technology Quadra Overdrive upgrades were easier to find, and should work even better for any 68040 machine expecting a 25 MHz 68040. One was apparently sold on eBay as an Amiga 4000 upgrade.

 

I've never found the Sonnet version in the past decade and a half that I've been collecting old Macs.

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Seems they made a few different versions of the QuadDoubler that were rotated in different directions to accommodate different systems (according to Amiga Hardware Database):

> available in different pin orientations - the QuadDobler model number BSW2001004950 installs parallel over the A3640

 

Different part #s I've seen (mentioned here, and on Sonnet's page here and here):

BST-40F - Centris 610 (and presumably Quadra Workgroup Server 60/20)
BST-50FA (BSW2001004950) - Quadra 610 Workgroup Server 60/25, also Amiga A3640 & "X-Calibur" 

BST-50FB - 100/50Mhz Quadra 660AV, 700, 900, Centris 660AV

BST-50FC - Centris 650

 

Presumably by looking at Mac models you'd be able to determine how they're rotated to fit in the chassis.

 

As far as rarity - good luck. Saw one at beginning of last year, and one at beginning of this year, and that's it. I missed getting those, been trying to get my hands on one for a long time. 

 

Attached are some images I've collected of ones in the wild over the years, maybe they'll help your search: 

 

From an eBay listing 2018 Feb by taddy-izumi

s-l1600-2.jpg

s-l1600.jpg

 

From ??

quaddoubler-3.jpg

 

From someone on reddit a few years back:

dbfRKUQ-sm.jpg

6mW7lWV-sm.jpg

7uBGaTp-sm.jpg

 

From Quadra 700 listing 2019 Jan:

s-l1600-7.jpg

s-l1600.jpg

 

 

 

This old thread now since lost in 68kmla transition had some images of an attempt to put one in a Performa 630. I believe this was @johnklos. Notice the addition of spacers, and the "spectrum engineering" label:

 

image24.jpg

image37.jpg

image39.jpg

 

Mentioned by @nglevin, this is actually the Newer Technology Quadra Overdrive.

 

According to this post on AF, it came in a regular and PLUS version, the latter having L2 cache (!). 

Edited by nickpunt

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Am I missing something here? Looks like a simple passthru board with a single GAL that ramps the system clock up to run a faster version of the CPU on the daughtercard. Is that it or is there more? :huh:

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The QuadDoubler / Quadra Overdrive only runs the processor at double speed when the bus relinquish signal is active. This way, literally everything that happens while the '040 is interacting with the motherboard happens at standard speed so there are no incompatibilities, and when no bus activity is going on (therefore the bus is relinquished), then the '040 is run at double speed. Stuff running in the caches will run faster, but memory intensive things won't.

 

italux: Contact me directly. I might have an extra I'm not using.

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Makes sense, was wondering about interaction with the system bus and whether the 68040 might have asynchronous capabilities similar to math co-processors. I guess they work in a similar fashion on the CPU bus when in use. The CPU would be set up to sync with the FPU's independent clock?

 

If that's the only operation of the GAL aside from its clock multiplying duty, it seems to me that there wouldn't be a need for much reverse engineering at all. Formulas can be developed without a need to read the GAL if necessary and the layout would be straightforward. Mimic the support circuitry and build the bus.

 

Is a faster 68040 available in SMT for embedded applications? Designing for TQFP alone would decrease the size of the board significantly, especially if the support components could be moved to the sides of the CPU rather than putting them in that center section extension between PGA sockets. Sonnet's solution of putting everything but the PGA/CPU within the footprint of the PGA/Host is quite elegant, so that would be better yet.

 

edit: forgot to mention that I was thinking along the lines of reducing overall footprint to make the unit's host compatibility a wider range. The Sonnet component centralization trick would make designing cards for CPU placement at any point of the compass a snap wherever necessary.

Edited by Trash80toHP_Mini
the usual

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Changing the clock speed of the 68040 while it is running might be tricky.   It might also be as simple as changing the clock that's being input.  But some chips want configuration gymnastics when changing speed.

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Awesome info on this topic. First step will be to tray and read the GAL when a board is available. Then trace for initial design and think the suggestion on making it as compact as possible is the way to go

 

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Looks like cloning the Sonnet board is the winner, does 2596 jibe with week 25, 1996?

 

Sonnet-GAL-left-top-bot.JPG.e4c1c3bb430e055f064ccb726adf4aa7.JPG

 

That would likely make this the most recent, certainly the most efficient in terms of PCB footprint and KISS compliant version. Such might explain the elegance of its design. Whatever card shows up for GAL formula spelunking, reduction of component count to this level and using a modern equivalent of the GAL20RA10B seems the obvious choice.

 

Thanks to nickpunt's longstanding search efforts we have a fabulous collection of trace details to build a large portion of the schematic.

 

Sonnet-GAL-right-bot-detail.thumb.JPG.6e7304176e4e690cf6dcf8e9309c8f19.JPG

 

Sonnet-GAL-right-bot.thumb.JPG.878c4d07e6caa2b7415d4cc8b16e8cbb.JPG

 

Sonnet-GAL-left-right-bot.JPG.ab99709d7e9bf40c08c24a9a683474a7.JPG

 

Sonnet-Solder-Side-TBMirrored.thumb.JPG.224087c7be53d31bda1f2f051fc015d1.JPG

 

Looks like the detail is probably good enough to match up vias surrounding the GAL topside with traces on the solder side and determine which may be thruhole and which must be blind connections to sub-surface layers. Given a graphic built up from these samples with pin/signal assignments we'll be good to go for examining function and formula requirements before having any board in hand at all.

 

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21 hours ago, trag said:

Changing the clock speed of the 68040 while it is running might be tricky.   It might also be as simple as changing the clock that's being input.  But some chips want configuration gymnastics when changing speed.

If we can't find the answer to that in the docs it might tested using stacked machine pin socket extension/riser layers with clock cutout and a breadboard set up for overclocking on the fly, no?

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