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Franklinstein

601 processor replacement experiments

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OK, tell me if I've got zny of this at least partially right? Vampire accelerators for Amiga are FPGA based using a proprietary soft core called 68080 developed by a company named Apollo? Is the ASIC they're intending to produce Amiga specific with the SAGA core on die or are they building a general purpose CPU? Only the latter makes sense to me from a business perspective.

 

We've but two target laptop CPU boards for 680x0 code: PowerBook 100 and Blackbird, then there are 68000 and 68030 PDS machines, including the Portable/SE in the 68000 camp and IIsi/SE/30 in the 68030 camp and then there's the 68040 PDS. Lest we forget, any socketed or socket upgrade ready CPU machine might work?

 

I was excited to find memory built into the FPGA, hoping it might be used as as virtual memory, but "MMU implementation is not currently planned for 68080 Core CPU." Maybe it could be configured as Cache?

 

Dunno, just trying to understand this a bit. Very interesting little tangent we've got going here. :approve:

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On 9/6/2019 at 10:37 PM, uyjulian said:

It would be interesting to accelerate 68k on ARM processor. This exists: https://github.com/PandTomB/uae4arm

Can't get to and won't understant the GitHub info, but now I'm wondering if that may be what Apollo is doing on the Altera Cyclone FPGAs.

 

cycv-lowest-system-cost-16x9.jpg

Is that ARM implementation powerful enough to do what they're claiming for the 68080. If they're running the 68040 instruction set on ARM, maybe the 601 instruction set would work as well. Lotsa, lotsa work, but if some of it's open source already, there's a start?

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On 9/8/2019 at 1:51 PM, Trash80toHP_Mini said:

Can't get to and won't understant the GitHub info, but now I'm wondering if that may be what Apollo is doing on the Altera Cyclone FPGAs.

No, the Apollo core does not run on the ARM core built into Cyclone V FPGAs. This is evident by the fact that the core can be implemented on Cyclone III family devices that do not have the ARM core. (And to be clear, not all Cyclone Vs have it either, only the "SoC" variants. Which Apollo accelerators do not use.)

Re: the link to UAE4Arm, that's just a repository for an ARM-tweaked version of the UAE version of the Amiga Emulator, it's not a magic gateway to an already implemented "I stick an ARM CPU into an alien CPU socket and run 68k code MOAR FASTER while looking just like the original CPU" widget. That said: I suppose if someone *were* to use something like an Cyclone 5 SoC to essentially adapt an ARM core to interface to a 680x0 socket you certainly could use the UAE CPU core as the basis for your 68k emulator. But honestly that's by far the most trivial aspect of this build; the hard/interesting part is going to be making the bus logic to make the Macintosh "body" accessible to the ARM brain. In principle at least one should be able to pull it off; you'll need to build the appropriate state machines in the FPGA so the accelerator "looks" like a 680x0 from outside and behaves correctly in response to the interrupts/bus sizing signals/wait states/whatever. Then from the ARM's standpoint I suppose the most straightforward thing to do would be to chop and shuffle the Mac's memory map a little so you can address the whole thing as a memory mapped peripheral, route the interrupts appropriately, and then set the whole thing up so when powered on it executes a compact and highly optimized 680x0 emulator out of the onboard RAM/Flash in the FPGA.

 

This is going to be harder than a simple software emulator, of course, because you *will* need to be able to respond to hardware interrupts/etc, in real time, unlike in a complete emulation where you can handwave/delay things to your heart's content, but it's probably... totally possible, assuming your ARM is fast enough. Essentially what you'd be building here is the equivalent of a 680x0 ICE pod. The real question, of course, is exactly how *much* faster you'll be able to run than the original. The Vampire accelerators for the Amiga replace a lot more than the CPU; they include their own RAM, and *also* replicate most of the custom chipset features internally. Broadly speaking they basically wear the host Amiga like a mask and themselves run internally essentially the same way as a full FPGA Amiga like the MiST/Minimig does. Access to any hardware outside the Vampire is *muuuuch* slower than operations inside of it. So based on that I suspect that if you *just* replaced the CPU in an old Mac with an FPGA-interfaced ARM CPU (or even a full "real" CPU core like the Apollo "68080") and didn't include RAM, etc, on the accelerator then the total gain you could expect would be... very likely disappointing.

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3 hours ago, Gorgonops said:

No, the Apollo core does not run on the ARM core built into Cyclone V FPGAs.

Didn't really think so, but had no idea how many horses that ARM "chip-in-a-chip" might have under the hood. Thanks for the breakdown. Those Vampire boards look a lot more like old school SBC cards for the ISA slot than a Mac Accelerator.

 

I read your post at work and that got me wondering about @bigmessowires Plus-Too project where the 68000 CPU is a soft-CPU module within an FPGA. It's tangential to the 601 discussion, but related enough in terms of Proc Swaps I guess? Thinking about the Processor Card in my PowerBook 100 again here. Could a Soft-Core 68000 be set up in FPGA (voltage issues aside) to run at high clock speeds as if on a Fast CPU/Memory bus with the 16MHz system connector as the bridged slow I/O bus as in later PowerBooks? The bridge as such would be within the FPGA.

 

Thinking here is that the FPGA would be using the equivalent of 8MB of internal memory as system memory and whatever excess available (probably a lot?) under the equivalent of RAMdisk+ as I did when the PB100 was new and had its memory maxed out. I set up the System Folder in the RAMdisk and it seemed really quick back then. Probably won't work with the 68000 but using 8MB of system memory within the FPGA would leave more room on the CPU board by reclaiming the PCB acreage of the standard 2MB of pseudostatic RAM. In itself, that would be a big deal as my 6MB expansion card isn't exactly available these thirty years later. Maxing memory within the FPGA and running it at whatever absurd multiple of 16MHz might be possible would be great. Heck, you could mount all the voltage hardware on the equivalent of that RAM expansion card. The FPGA voltages might even be run over the redundant data/address traces between connectors? Some of the CPU connection line leveling might be done across the redundant memory bus as well?

 

Just spitballing here, interesting stuff! :approve:

 

 

edit: too bad there's pretty much no such thing as a working PowerBook 100 battery. The FPGA would probably extend up time significantly? It's probably a no-no, but having the ROMs in the FPGA would help quite a lot as well when it comes to speed bumpage. [}:)]

Edited by Trash80toHP_Mini

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