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Bolle

Building the fastest Power Mac 9600

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I snatched up one of the faster Sonnet G4 upgrades for old world PCI machines recently. It was the 700MHz/1MB model. They made that same card in 800/1 and 1000/2 configuration as well.

Only a few of the 1GHz one were ever made when Sonnet was selling off the remaining cards and Motorola supposedly could not deliver any slower 700MHz and 800MHz chips anymore.

Knowing that they just stuck a faster chip on their existing board design made me think... why not go full retard and head for the latest and greatest the 7455-line of CPUs has to offer?

The 7455 has bus/cpu multipliers going up to 28x and the fastest chip available is rated 1400MHz - as if that was not made to be run on a 50MHz bus in an old world Power Mac.

 

I started gathering some donor boards right away: a dual 1.42 MDD CPU board with one dead CPU and another Sonnet CPU upgrade with a dead CPU for 2MB worth of cache.

 

IMG_4584.thumb.JPG.5b518ddab7d94d0aeb23239a7a5faaec.JPG

 

 

A quick test if my newly acquired upgrade works at all - it did: so off with the unwanted stuff:

 

IMG_4587.thumb.JPG.40b7e7c8cce47e1c96eddf1ad1ac166f.JPG

 

 

Preparing the donor CPU...

 

IMG_4590.thumb.JPG.cabc94c0d480b1c58cd25dbfd6db08da.JPG

 

...and onto the board it goes:

 

IMG_4591.thumb.JPG.908ae7b4fad3db7fdf91473ab3090338.JPG

 

The additional address line on the bigger cache chips is routed to the CPU as expected so on there with them as well:

 

IMG_4592.thumb.JPG.35e63140b7c4235df07b372d405db5e3.JPG

 

 

Screwed on the heatsink, dropped it into my 9600 and it chimed right away.

It clocks up to 1.4GHz nicely and seems to run stable. I set the CPU core voltage to 1.45V - 1.40V would not boot as well as 1.55 wouldn't leaving me with only 1.45V or 1.5V to choose.

 

At the moment I am still having issues getting the L3 cache to work. It does not want to detect either the original 1MB or the 2MB I did steal from the other upgrade.

Let's see how that can be solved...

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Neat project. Very tough to do BGA work at home!

I used to do customer return analysis on those parts and had to de/re-sphere parts but I had our whole assembly area at my disposal.

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Wow.  So very cool.

 

Those K7A803609 cache chips are rated for 250 MHz.   With the CPU running at 1.4 GHz, you'd need a 1:6 cache to CPU ratio to keep them under speed, although 5.5 would get you just over 250 MHz.

 

How is the cache to CPU ratio set?   At a guess, it was 1:4 on the original card.    If that's still the case, then the cache is trying to run at 350 MHz and can't keep up.

 

Try clocking the CPU down to 1 GHz and see if the cache starts working, if  you have not already.

 

Oh, and dual 1.25 GHz MDD G4 cards for $14 each, although probably more to Europe.

 

https://www.ebay.com/itm/Apple-661-2914-PowerMac-G4-1-25GHz-CPU-module-Mirrored-Drive-Door/262597046860?ssPageName=STRK%3AMEBIDX%3AIT&_trksid=p2060353.m2749.l2649

Edited by trag

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Already tried that and cache won't kick in either. Have been going as low as the original 700MHz. Makes me wonder if the CPU is having issues. Going to try even another one.

Cache ratio is set in software once the driver loads.

 

Not totally sure what Sonnet has going on with that small PLD on there and if they used different firmware on there for different CPUs. Original CPU was a 7451, new one is a 7455B.

The 800 and 1GHz boards coming directly from Sonnet should have 7455A. This should not do any difference I would say though, as I have been replacing 7450s with 7455Bs before and caches kept working... unless Sonnet is doing some kind of magic again here.

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Well darn.  Too bad it wasn't a simple speed problem.   Digikey still sells new cache chips, 250MHZ, 1MB, for about $14, IIRC.  I mention in case you want to try non-salvaged chips.

 

 

I don't know but am pretty sure the PLD is there to kick the bus req/grant lines at the right time.  

 

The six slot machines had a problem with G4 processors.  Newertech identified the problem and developed a fix while everyone else (except XLR8) were still drooling.  Then Newertech promptly went out of business.  Sonnet hired some of Newertech's brains, which was the first smart thing they did; Sonnet products were always inferior and less compatible, and shortly after that Sonnet's G4 card for PCI PowerMacs came out.   One of the Newertech guys (or was it XLR8?) explained the problem in detail and it had something to do with bad bus requests or grants or behavior from the second Bandit, which was fixable by watching the bus logic and stomping on a signal at the right time.

 

Soooo, long way of saying the pld is probably there to watch and manage those signals.     I posted the CPU slot printout in the Wiki here, so if you really want you could trace the pins and see if they're connected to BG BR and I think there's a retry or busy signal too.

 

BTW, brain fart earlier.  The Ebay link in my previous post is for single CPU MDD cards, not dual.  Apologies.

Edited by trag

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Serious workstation you have going on there. Getting a bit more technical than I desire to understand, but nice job on the chips swapping. Would be awesome having the only upgrade of its kind if you can get the cache working! 

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very nice work!

 

im quite interested in how you managed to overclock the sonnet CPU card? generally sonnet CPU cards are not overclockable... (I have a 500Mhz 7410 Sonnet encore ZIF id love to be able to fiddle with multiplier on that especially as in my 83.3Mhz bus G3 beige it sets the Multiplier to 5x and as such the CPU only runs at 416Mhz)

 

as for the L3 cache not being detected, I had backside cache issues when the CPU had not reflowed properly onto the board, I would recommend putting a ring of flux around the chip and using a hot air gun blowing it under the chip and reflowing the CPU again which you can read about here https://forums.macrumors.com/threads/making-a-g4-pismo-upgrade-at-home.2019269/#post-24576522

 

also how are you soldering the L3 cache on? I find heat gunning on TSOP chips does not work well and that your much better off drag soldering them on (it also reduces thermal stresses on the chips this way)

 

as to upgrading the backside cache amount, on apple 288 pin socket 3 ZIF CPUs the cache amount and speed is set by 3 resistor straps, and on 300 pin Socketed G4 cards theres a 256 byte SPD/I2C EEPROM which i suspect contains info pertaining to the backside cache, I actually found a Motorola datasheet on the 288 Pin Socket 3 ZIFs that G3 beige/BWs etc use http://cache.freescale.com/files/32bit/doc/data_sheet/MPCPCMEC.pdf?fsrch=1&sr=41

 

otherwise very cool to see someone try this, I had thought about something like this my self but I dont own such rare upgrade cards nor did I think anyone knew how to change the PLL multiplier on sonnet cards :) May I suggest trying to stick the second 1.42Ghz CPU onto something like a 550-1Ghz G4 TiBook or a 700-1Ghz eMac/iMac G4? quite a few of those machines in that speed range use 7450/55 CPUs so a 1.4Ghz 7455 would be a nice upgrade (especially for something like a 550Mhz GigE TiBook :p ) (edit: whoops missed the part where ya mentioned the second CPU was bad, how did ya figure that one out, out of curiosity?)

 

PS do you have any system profiler/about this mac/sonnet metronome shots of this now 1.4Ghz 9600? and also is it possible to overclock the 1Ghz G4 ZIF sonnet produced? :)

Edited by LightBulbFun

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This upgrade is indeed the only one I know of that Sonnet ever made where the multiplier is not set by some PLD magic besides the MDX where you had resistors as well.

Instead it has PLL_CFG[0..4] broken out to five resistor pads for changing the multiplier easily. Same with the VID pins of the voltage regulator.

 

I was going to reflow the CPU again but did not find the time yet. I remember reading in the big CPU swap thread that someone else was having issues with cache that disappeared after reflowing the CPU again.

I have another 1.25GHz 7455B that will go on there instead if reflowing does not help. The original 1MB cache is on there again right now, so setting the cache size is a problem not to worry about right now (but will become one once I get the cache working at all with the new CPU)

 

The TSOP chips are indeed best soldered on with an iron and drag soldering. I checked them multiple times for bad connections but they are fine. I was suspecting that there must be a way to set different cache sizes on the board itself so the driver knows what's going on once it activates the cache. On later machines L3 cache is activated right in Open Firmware and some CPU board came with a 1:4 setting while some had 1:6 with no visible difference on the board itself so your EEPROM theory makes perfect sense ;)

 

The 1GHz ZIF upgrade does not have any of the PLL_CFG broken out to solder pads. I did not look that one up yet in detail (I have the ZIF upgrade but no Beige or B/W G3 to actually use it) but I suspect the PLL_CFG pins going to one of the PLDs or FPGAs on the upgrade.

This upgrade is a bit of a strange guy because you can insert it into the ZIF socket in two different orientations for either the B/W or Beige and two FPGAs shift around the signals accordingly depending of which way it is plugged into the socket.

I would guess you could just lift the PLL_CFG pins on the PLD and connect them to VCC or GND as you like to manually set the CPU speed.

 

Edited by Bolle

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very interesting, which resistors are those exactly on both the 745x based Beige PCI cards and on the MDX upgrades? im guessing the 745x upgrades have regular PLL Resistors as they dont have to worry about auto-ranging since the bus speed is always set to 50Mhz with one of these...

 

I have actually been wondering if you could solder 2 7448s in place of the 7447A/Bs on an MDX card and make the first 7448 MDD CPU upgrade card, that would be quite something.

 

I have included a dump of the I2C/SPD EEPROM found on a 1Ghz Single CPU MDD FW800 CPU card I have, it would be interesting if anyone can make sense of it.

 

do the PLL pads on the 400-500Mhz Sonnet ZIF cards also go to some sort of PLD/FPGA or? there is defo a multi-pinned chip on mine with a sticker over it which im guessing is some sort of PLD/FPGA of some kind 

 

(the card I have which is a 500Mhz one I have when on a 66.8Mhz bus will set the multiplier to 7.5 but on anything faster it sets the multiplier to 5x for 100*5=500Mhz but on a G3 beige where the bus is set to 83.3Mhz it runs at only 416Mhz... im quite curious now how the card would react to being installed into a Slocket and run on a 50Mhz bus, I own a G4 compatible slocket but i dont own any PowerSurge based Macintoshes sadly.)

 

im defo going to be following this thread quite closely :) (I wonder if a 7457 would work on one of these boards? shame chips that apple did not use are so hard to find)

 

 

 

 

1Ghz-Single-7455A-1MBL3-MDD-CPU-CARD-SPD-EEPROM-DUMP.bin.zip

Edited by LightBulbFun

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I have a XLR carrier and said 500MHz Sonnet G4 ZIF as well, I will check that out. Also will go ahead and dump the ROMs from the MDD cards I have. Comparing them might reveal some of their structure.

The document you linked above also includes the structure of how you should fill that I2C ROM with information, it might not have changed too much on those newer PCMs.

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Alright, so no cache love even with another 7455B CPU that does detect the cache on it's original CPU board just fine. I start to suspect they might have a different firmware on that FPGA for different CPU series.

I soldered the original 700MHz 7451 back on and cache is working just fine with that one. I'll see if I can go up to 2MB with the original CPU before trying any other CPUs. I have a 7455A and a 7455 I could try as well and I think there is an 800MHz 7450 flying around somewhere as well.

 

The 500MHz Sonnet ZIF is running at 9x when used in the XLR8 Carrier, no matter what bus speed I set (can't get any further up than 55MHz though)

 

5b17f4492a3a1_Bild1.png.9ad07b94e937bccae2a32a6f29ec4745.png

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very nice work!

 

shame the L3 refuses to show up :/ have you seen how far you can clock the stock CPU? the fastest 7450 Apple used was on the 867Mhz quicksilver IIRC but I hear late 800Mhz eMacs can clock up to 1.33Ghz but I cant recall if those had 7450s or 7455s.

 

also interesting on the ZIF sonnet card, it looks like if it detects a Bus speed bellow 66.8Mhz it sets the Multiplier to 9x which is the maximum multiplier supported by the XPC/MPC7410 CPU (50*9=450) im glad Sonnet thought about the Slocket adapters/PowerSurge machines, means the ZIF should work nicely in any future Beige Machine i get with my XLR8 slocket :)

 

and thanks for the dump :) it does looks like there are some differences between mine and yours...

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After digging through datasheets there are indeed a few differences in two L3 cache related registers with the 7455 starting with revision 2.1 (and even another difference with rev 3) compared to the 7450.

If I understand it right those settings are related to the output hold timing. If the software does not set those registers they will default to the longest hold time possible on rev 3 and later CPUs or to the shortest hold time possible on rev 2.1.

The register is not supported at all on the 7450. I might be lucky with the 7455A which should be rev 2.1 in this case.

 

Looks like I will have to install OSX on here to manually mess with the registers (or read them at first to see how they are set up by the driver)

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Not really... cache is dead even with the original CPU and 1MB chips installed it does not show up.

Besides the cache issue it is running fine at 1.4GHz though - just needs proper cooling.

 

I will give it another try someday with a 7455A. I won't be able to reach 1.4GHz with that one though.

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shame about the L3 cache vanishing, I have never had much luck with TSOP chips myself.

 

with no L3 it would be a good board to experiment with, try a 7457 on it? those have 512KB of L2 so should help with the loss of L3.

 

BTW have you tried contacting sonnet for some details on the CPU card? A friend of mine doing stuff like we do contacted sonnet for info on the TAM G3 upgrade cards and actually got back a good wealth of detail :)

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Indeed. The extensions test the cache size and speed and afterwards set the correct registers.

They fail at picking up the cache for testing though and I did not find a way yet to force the cache registers the way I want them.

ReggieSE in OSX won't let me do it.

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On 10/18/2018 at 6:38 PM, LightBulbFun said:

Just wondering did you make any progress with this? :)

 

I recently got a 9600 myself and Have been having much fun playing/experimenting with it

 

which you can read about here :) https://forums.macrumors.com/threads/powersurging-to-mac-os-x-10-5-8-power-macintosh-9600-fun.2144305/

What is the performance of the stock machine like when running Tiger? And would your build (made on a dual G5) run both processors of a dual 604e card, do you think? Or is that a limitation in xpostfacto?

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8 hours ago, Bolle said:

Indeed. The extensions test the cache size and speed and afterwards set the correct registers.

They fail at picking up the cache for testing though and I did not find a way yet to force the cache registers the way I want them.

ReggieSE in OSX won't let me do it.

And that's even with the original SRAMs installed? You mentioned back in June that you "soldered the original 700MHz 7451 back on and cache is working just fine with that one." Is it still enabling with the 7451, but fails with the 7455?

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