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About trag

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  • Location
    Austin, TX
  • Interests
    Model & Amateur Rocketry
  1. ATI Radeon 9800 Pro 256M - STRANGE Mac Edition

    The ATI FireGL X3 is available on Ebay for about $12 shipped. You'd have to flash it, or program a serial EEPROM and replace it. The FireGL X3 is equivalent to a Radeon X800. Supposedly faster than a 6600. I don't think there's OS9 acceleration though.
  2. Bolles finds

    What OS are you having crashing problems with?
  3. There are some SIL3112 cars on Ebay for $20 with the Flash chip in a socket, which can make things easier. Searching on PB3112SATA150 will likely turn them up. Looks like there aer 9 left.
  4. Mounting PPC750GXs & PPC750FXs on ZIFs

    Supplementing the above summary of the differences in the PPC750 family, including a section on the differences in the pinout of the original 750, the 750CXe and the 750FX: 750FX_APP_diff_doc_DD2.X_V1.0pr.pdf The 750GX is pin compatible with the FX.
  5. Bolles finds

    Looks like my last guess may have been correct. Early IISX before they added teh DSP connector and it still has a resolution selection switch on board. U219 is the firmware chip in both of those photos. I think my earlier referenced link has a PPC updater for the Futura IISX. It might flash those cards to a more up to date rev. Or hose them completely, but I think, back then, they wrote those updaters to they'd tell you if they weren't good for one of their own products.
  6. Bolles finds

    @omidimo Well that one is odd -- or at least, utterly unfamiliar to me. I thought I was pretty well versed in the E-Machines family. Perhaps I'm misremembering and the Futura Color 8 was a long card and the Futura (no II) was a short card with a dial? I don't know. Does TattleTech have anything to say about it? Or maybe there was an early variant of the Futura II before they developed soft resolution switching.
  7. I would be an interesting exercise for a number of reasons. FPM RAM is slowwwwww...., even compared to the old 20 - 40 MHz bus speeds. I have not examined the 680x0 bus protocols in sufficient detail to be sure, but it looks like when the CPU does a read or write to memory it waits for a bus acknowledgement signal rather than just having some number of wait cycles programmed in. So, if one were to build a very fast memory subsystem, based on a cheap DDR2 DIMM and one of the cheap Xilinx FPGA that now have built-in DDR2 controllers, and added 680x0 and Q950 compliant GLU so that when the CPU does a read or write to that RAM card, it gets back an ACK on the very next cycle, that might be much faster than built-in memory. The trick would be figuring out some way to tell the OS that there's RAM in those addresses. I'm not quite sure how the RAM detection routine at boot up would handle that, but I bet bbraun knows...
  8. The 128 MB SIMMs should work fine. The TLDR for my above post is that the wiring is there for 128MB SIMMs, but not for 256MB. However.... In my experience, 128MB SIMMs often don't work. The reason, I believe, is as I mentioned above. Apple ties their RAS lines together in pairs. Typically, on a 128 MB SIMM the RAS lines are also tied together in pairs. Which is fine, if the pairs correspond, and a big fail if they don't. For example, if I have RAS lines 1, 2, 3 & 4 and the 6100 logic board ties together lines 1 & 2 and then lines 3 & 4. Then whatever line 1 sees, line 2 sees. And vice versa. Similarly for 3 & 4. If the SIMM ties RAS lines 1 & 2 together and ties 3 & 4 together, then everything is great. The logic board sends a signal on RAS 1 or 2, and RAS 1 & 2 on the SIMM sees it. RAS 3 & 4 don't. The logic boards sends a signal on RAS 3 or 4 and on the SIMM RAS 3 & 4 sees it, and 1 & 2 don't. Everything is working great, and the RAS pairs are distinct. However, if the SIMM ties together RAS lines 1 & 3 and also 2 & 4, now let's look at it. Logic board sends a signal on RAS 1 or 2. Because they are tied together on the logic board, RAS lines 1 & 2 both see this signal at the SIMM. Because the SIMM ties 1 -> 3 and 2 -> 4, this means that all four RAS lines see the signal. The Banks of the SIMM are no longer getting distinct RAS signals. I mainly purchase the HP D4893 and D4290 (can't remember which one is 128MB) SIMMs and they don't work in the 6100, although they work great in the Q605/LC475/LC476. I suspect, but never got around to checking, that the RAS lines are tied together in the opposite pattern. There are some little SM resistors on those SIMMs too, and if I ever get back to that investigation, I'll check to see if those resistors control which RAS are tied togehter. Those SIMMs might work just by moving two resistors. It's also possible that the CAS lines are involved in some way, but from what I can tell, those should only be used to control byte-wise selection, not addressing.
  9. Zif Carrier Advice

    Squared. There were 1.2GHz G3 ZIFs??? I thought only PowerLogix made ones faster than 500 MHz and they topped out at 1.1 GHz, I thought...
  10. I still think that Steven Kan is a little to credulous about the reports of 520MB RAM in the 6100. He says he's had two separate reports, so maybe it's true, but I've traced the memory pins in the SIMM sockets of the PM6100, and I can't see any way one could address a 256MB SIMM. A 72 pin SIMM is 4 bytes wide in data (32 bits). It has 12 address lines which are multiplexed (used twice) to supply addresses. So there are 22 bits of address. This creates 24 bits of addressing which translates into 16M addresses. With 4 bytes at each address, one can directly address 16M X 4bytes = 64MB of RAM per SIMM. Then they do the fun trick of banks on 72 pin SIMMs. Banks are distinguished by only activating some RAS signals when supplying the Row Address (one of the two uses of those 12 address bits). There are four RAS lines on a 72 pin SIMM, and the RAS lines are encoded in a one hot fashion, so, in theory, one could have four banks, one for each RAS line on a SIMM. If one had four banks and each bank was 64MB, then one could actually have a 256MB 72 pin SIMM. The problem is that on the 6100 logic board, the RAS lines in each SIMM socket are tied together in pairs. So only two distinct RAS signals are available, limiting one to two banks of 64MB = 128MB SIMM maximum. Taking this still further, it is conceivable that the RAS lines are not being encoded as one-hot, if that's the case, then one could still get four banks (00, 01, 10, 11 on the RAS signals) on the SIMM. But that require logic on the actual SIMMs to decode the RAS signals for the memory chips, and vastly more farfetched, it would require that Apple wrote code in their firmware to support binarily encoded RAS signals in their memory. I mean, it's possible, but really really farfetched, given that they've never supported such a thing any where. All that said, his 6100 page is excellent, except for that one little nitpick.
  11. Bolles finds

    It's a Futura II, probably an SX. I can tell by the short length (Futura (not II) were long cards), lack of a rotary selector switch, and the presence of connectors for the ethernet daughter card and DSP coprocessor board. While the ethernet daughter board is nice, the fact that it causes the machine to hang when it loads Open Transport limits its utility. Works fine with classic networking though. It looks like it has a IIsi mounting bracket attached. Here's an image of the 10baseT daughter card. I have drivers for the Futura II SX here: https://www.prismnet.com/~trag/Mac_Drivers/ Not obvious that the EMFII_Accessories is one of the disk images for that. Hmmm, and I don't remember what the Installation.img.bin file is anymore. Might want to grab that and decompress it just in case. Also a little update that a nice fellow wrote back in the 90s that fixes some compatibility issue with later OSs. https://www.prismnet.com/~trag/Mac_Drivers/ E_Machines3.5.6patch.sea.Bin I can't remember the details any more. With any luck there's a readme in the archive. It was something like allows the QD acceleration extension to work with OS later than 7.5 or 7.1 or something, but you still lose one of the functions of the control panel, but it was a seldom used function, like the extended desktop, maybe. I think. Really old memories. I'm sure I have the email from the author archived somewhere that I cannot conveniently get to it...
  12. Glide Strips for ADB mouse?

    I bought a couple of rolls of adhesive backed teflon tape some years ago. Picking the right thickness is key as the mouseball only works in a pretty narrow range of heights. I would post the thickness I bought that worked, but I can't find any record of the purchase. Too long ago. The worst part is that the front teflon pad on the ADB mice is an arc and it's really hard to cut out a piece of teflon tape to match.
  13. Zif Carrier Advice

    I don't think that any of the ZIF carriers actually have a CPU frequency limit. There's a limit to have fast of a clock signal they can supply to the CPU, but what the CPU does with it afterwards (multipliers) won't be (entirely) controlled by the carrier card. That said, that limitation was probably written by marketing, back when the top CPU:bus multiplier was 10:1. So XLR8 figured, "well, we can supply a 50MHz clock, and the highest clock mulitplier is 10:1, so our top speed must be 500 MHz." And the jumper/switch settings for the clock muiltiplier are on the carrier card. The above does not reckon with the fact that later CPUs redefined some of the clock multiplier codes/pin settings to mean different, higher multiples, nor did it take into account the chips which are capable of a soft multiplier setting (PPC750fx, PPC750GX). In my opinion XLR8 probably had the best, most developed carrier card technology, but ultimately, a carrier car is pretty simple. It must supply a clock signal (generally between 40 and 50 MHz (although up to 65MHz can be useful), it must have onboard power regulation that honors voltage level pin settings from the ZIF, and it needs to have switches/jumpers to properly bias the CPU clock multiplier pins on the ZIF card. PowerLogix made a smaller, simpler carrier card that seems solid. I think Formac also sold one. And NewerTech sold a few as well.
  14. Bolles finds

    It looks very similar to some of the Lapis designs, although which direction the derivation might have gone is not certain. But all of their appearances follow a certain functional logic. In this case, I'm thinking of Lapis cards I've seen that are based off a large (at the time) FPGA chip. All the Lapis boards I've seen used Xilinx and this one has a TI chip of some flavor on board, which might not be an FPGA.
  15. Mounting PPC750GXs & PPC750FXs on ZIFs

    I just lucked into a lot of 7 PPC750GX in the 933MHz grade, which I think PowerLogix used on their 1.1GHz cards. So, if someone finds that pin grid array laying around in a bin at an old electronics store, then I can add it to the list of things that I never seem get any closer to doing.