Interestingly, the tech note doesn't mention the second Fast Internal Bus in the 8100. Only the external/internal bus is mentioned. The "custom" chip starting with the AV Quadras and running through the NuBus PowerMacs and on into the PCI PowerMacs is the AMD AM79C950 which Apple called CURIO. It containsthe equivalent of a 53C94, an 85C30 and some kind of ethernet MAC. It was a custom job from AMD for Apple and the datasheet is not available.Here are the official SCSI transfer rates for given Mac models according to Apple:
http://support.apple.com/kb/TA29470?viewlocale=en_US
Most of them really suck, of course, since many of them are based on the 53C80, this is no surprise.
Also, for the PB 500 series, when it says "Custom IC" they really mean it's a 85C80 derivative smashed together with the serial controller into one chip, probably to save space/money/etc...
In discussing this with dad, is it possible to replace the 53C96 chip with the 53CF96 and automatically improve performance? Or does the ROM has something to say about the speed limits the buss can have? He has been wondering for months, what if he replaced the old slow 5380 from the old Macs with a faster chip like the 53C96. Pin to pin compatibility would be an issue but an adapter could fix that. But would ROM slow down the data transfers?The 8100 was the first Mac with a Fast SCSI bus in addition to the regular slow bus. While the Q900/950 had dual SCSI busses, they were both based on the 53c96. The 8100 used the 53CF96 for it's internal Fast bus.
After the 8100, Apple switched to their "MESH" chip for the internal Fast SCSI busses in the PCI PowerMacs. I suspect, but don't know, that MESH is really just a licensed 53CF96. One of these days, maybe I'll try replacing one with the other to prove or disprove it.
On Macs with double SCSI buses like the 8 and especially 9 series machines, usually they had the standard MESH cell (providing internal and external SCSI) integrated into whatever combo I/O chip they were using, and the fast SCSI bus (internal only) was implemented on a licensed copy of the 53CF96 (usually it was branded as LSI or VLSI). It has the same physical footprint and everything.After the 8100, Apple switched to their "MESH" chip for the internal Fast SCSI busses in the PCI PowerMacs. I suspect, but don't know, that MESH is really just a licensed 53CF96. One of these days, maybe I'll try replacing one with the other to prove or disprove it.
For 7500/8500/9500/73007600/8600/9600 etc. I thought the fast SCSI (SCSI II) 10 MB/s MESH for internal SCSI was built into Grand Central but the developer notes (9500, 9600) and schematics show it's a separate chip. The Curio SCSI (SCSI I) 5 MB/s 53C94 is built into Grand Central for external SCSI (and external SCSI on the 7200).From what I've read in Apple's developer notes, SCSI cells integrated into Apple ASICs never supported anything over 5MB/s (as explained in this dev note for the beige G3 that uses the Heathrow I/O controller) whereas the 53CF96 and its clones could do up to 10MB/s.
Maybe it's a terminology thing that has been mixed up and/or supplanted, but none of the I/O controller-integrated SCSI cells (as used in Curio, Grand Central, Heathrow, etc., sometimes to as "MESH") ever went over 5MB/s. That's why they had the secondary fast SCSI bus on the high-end models.