Macintosh IIcx custom ROM

[Phipli]

Scratch that, maybe this isn't an issue. Yes different memory controllers, but they both end up calling MOD3TEST and REVMOD3TEST. So after thinking about this, this hypothesis is likely flawed.

The IIsi ROM is a "universal" ROM - it has code in it for multiple model computers. It doesn't blindly execute the setup for the IIsi only, but checks the host box ID and sets up the hardware for that. It even does some testing and dynamically reacts to what hardware is physically present. It contains parameters for the IIcx.

 

[frontein1]

The IIsi ROM is a "universal" ROM

Yes 100%. As long as the IIsi ROM was patched correctly, the memory test should be skipped on the IIcx.

 

[Phipli]

Yes 100%. As long as the IIsi ROM was patched correctly, the memory test should be skipped on the IIcx.

Ah sorry, I misunderstood - I thought you meant it wouldn't boot the IIcx, I realise you meant execution would take a different path that might miss the IIsi style patch.

But as you decided yourself, yes I think the common patches generally work because people use the usual patches on the SE/30 which is basically a less good IIcx with the same chipset and less expansion.

 

[luRaichu]

Did you remove that jumper when you installed the ROM SIMM?

Yes. I know I'm running the IIsi ROM since the 32-bit addressing option appears in the Memory control panel.

 

[frontein1]

Through debugger, do a DM 408467E0. And also a DM 408468F8. Share the output here. The first two bytes of each should be 4ED6.

(Is the ROM base 4000 0000 or 4080 0000 on the IIsi, I can't remember?)

 

[Phipli]

Through debugger, do a DM 408467E0. And also a DM 408468F8. Share the output here. The first two bytes of each should be 4ED6.

(Is the ROM base 4000 0000 or 4080 0000 on the IIsi, I can't remember?)

4000 0000

 

[croissantking]

4000 0000

Same as the PB 500 series @frontein1 ! And I guess many other models.

I don't fully understand why the ROM gets moved from 0000 0000 on first access, and in general why there are duplicate images of it.

 

[Phipli]

Same as the PB 500 series @frontein1 ! And I guess many other models.

I don't fully understand why the ROM gets moved from 0000 0000 on first access, and in general why there are duplicate images of it.

Hum, the exception table needes to be at zero (on the 68000 at least), and needs to be writeable, but the 68k reset vector points to zero so ROM needs to be there too.

Plus it slightly improves maths because ram addresses are more frequently absolute instead of offset + address. Saves a bit of time frequently enough to improve performance. Probably other reasons and I'm sure I'm mangled it.