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This kind of gets to the point where you have to get out the magnifying loupe and go over every mm of the board like a man obsessed. It could be something really subtle, like a trace that looks ok, but is actually bad, or possibly something that can't be seen (board was flexed physically or do to cyclic thermal expansion and contraction the break it actually inside the board).
It seems like you'll be chasing ghosts if you want to get to the root of this problem, but you may have to accept that there is no answer that won't take dozens or even hundreds of hours to solve.
It seems like you'll be chasing ghosts if you want to get to the root of this problem, but you may have to accept that there is no answer that won't take dozens or even hundreds of hours to solve.
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Yes, just try these two and UG8, the rest of the chips I think are discarded.
True, possibly be a little imperceptible flaw in the PCB.
Anyway my time and my patience are finite.
At the moment I think I leave it, thanks for everything.
Interesting mystery!
Please feel free to stop reading now. uniserver's advice, as always, is more than good enough! But I can't resist taking a crack at the puzzle.
The photo looks like the screen starts almost exactly below the menubar. That's 20 pixels I think. From the photo with the bright retrace lines, it's pretty clear that the video is being drawn starting from the 20th row-- i.e. it's not drawing 20 rows of black pixels at the top, it's just starting partway through the buffer.
Here's the relevant part of the logic board schematic:
UF8 counts pairs of scan lines. Its outputs drive the VRAM and UG6, which does some logic to generate the vertical sync pulse. One other thing UG6 does is generate a signal called "LCTRRST" ("line counter reset" I guess) at pin 15. When the end of the vertical sync pulse arrives, LCTRRST appears to reset both counters inside UF8 to 0, to start back at the beginning of VRAM.
There are 342 lines on the screen, plus 28 more blank lines during the vertical retrace period. So when the counter gets to the end of a full frame, it would read 370 lines, or 185 pairs (output from UF8: 10111001). After that it should go back to 0 because of LCTRRST. But if pin 2 (the "clear" signal) on UF8 was disconnected, the counter would just carry on where it left off: 1001 --> 1010. So the line counter wouldn't reset back to 0 like it should, but instead to 00001010 = 10 pairs of lines = row 20. The screen would start drawing from 20 rows down, which is exactly the screen that you see!
I got interested in this bit of circuit last year when the vertical sync disappeared from my SE/30. It turned out that cap goo ate out one of the traces attached to UF8, between the chip and the via. The break wasn't even visible under a microscope, but there was no continuity. Soldering a little piece of wire (red circle) solved the problem. The yellow arrows are the pins I'd check first, though it's easy enough just to check them all:
The fact that the SE/30 video circuit is discrete logic opens up some interesting possible hacks. I'm thinking that by modifying the wiring to UG6 and editing the video ROM, it might even be possible to cram a few more lines on the screen.
Sorry for long post. This theory may be way off...
Yes, I'd go for swapping UF8 (and maybe UG8 while you're at it). More specifically, I'll take a wild guess and put my bet on pin 2 of UF8-- check that there's continuity between UF8 pin 2, UF8 pin 12, and UG6 pin 15. If those connections are good then definitely replace UF8.
Please feel free to stop reading now. uniserver's advice, as always, is more than good enough! But I can't resist taking a crack at the puzzle.
The photo looks like the screen starts almost exactly below the menubar. That's 20 pixels I think. From the photo with the bright retrace lines, it's pretty clear that the video is being drawn starting from the 20th row-- i.e. it's not drawing 20 rows of black pixels at the top, it's just starting partway through the buffer.
Here's the relevant part of the logic board schematic:
UF8 counts pairs of scan lines. Its outputs drive the VRAM and UG6, which does some logic to generate the vertical sync pulse. One other thing UG6 does is generate a signal called "LCTRRST" ("line counter reset" I guess) at pin 15. When the end of the vertical sync pulse arrives, LCTRRST appears to reset both counters inside UF8 to 0, to start back at the beginning of VRAM.
There are 342 lines on the screen, plus 28 more blank lines during the vertical retrace period. So when the counter gets to the end of a full frame, it would read 370 lines, or 185 pairs (output from UF8: 10111001). After that it should go back to 0 because of LCTRRST. But if pin 2 (the "clear" signal) on UF8 was disconnected, the counter would just carry on where it left off: 1001 --> 1010. So the line counter wouldn't reset back to 0 like it should, but instead to 00001010 = 10 pairs of lines = row 20. The screen would start drawing from 20 rows down, which is exactly the screen that you see!
I got interested in this bit of circuit last year when the vertical sync disappeared from my SE/30. It turned out that cap goo ate out one of the traces attached to UF8, between the chip and the via. The break wasn't even visible under a microscope, but there was no continuity. Soldering a little piece of wire (red circle) solved the problem. The yellow arrows are the pins I'd check first, though it's easy enough just to check them all:
The fact that the SE/30 video circuit is discrete logic opens up some interesting possible hacks. I'm thinking that by modifying the wiring to UG6 and editing the video ROM, it might even be possible to cram a few more lines on the screen.
Sorry for long post. This theory may be way off...
Its the closest anyone has been so far...
wow
Your response is encouraging and has the logic that was looking for.
Where have you been all this time?
I checked that there is continuity between UF8 pin 2, UF8 pin 12, and UG6 pin 15. I think that the next step is replace UF8.
I'll trying to get one of these ICs and will leave doubts.
Thank you.
Wow!Interesting mystery!
Yes, I'd go for swapping UF8 (and maybe UG8 while you're at it). More specifically, I'll take a wild guess and put my bet on pin 2 of UF8-- check that there's continuity between UF8 pin 2, UF8 pin 12, and UG6 pin 15. If those connections are good then definitely replace UF8.
Please feel free to stop reading now. uniserver's advice, as always, is more than good enough! But I can't resist taking a crack at the puzzle.
The photo looks like the screen starts almost exactly below the menubar. That's 20 pixels I think. From the photo with the bright retrace lines, it's pretty clear that the video is being drawn starting from the 20th row-- i.e. it's not drawing 20 rows of black pixels at the top, it's just starting partway through the buffer.
Here's the relevant part of the logic board schematic:
Screen Shot 2016-01-09 at 01.51.46.png
UF8 counts pairs of scan lines. Its outputs drive the VRAM and UG6, which does some logic to generate the vertical sync pulse. One other thing UG6 does is generate a signal called "LCTRRST" ("line counter reset" I guess) at pin 15. When the end of the vertical sync pulse arrives, LCTRRST appears to reset both counters inside UF8 to 0, to start back at the beginning of VRAM.
There are 342 lines on the screen, plus 28 more blank lines during the vertical retrace period. So when the counter gets to the end of a full frame, it would read 370 lines, or 185 pairs (output from UF8: 10111001). After that it should go back to 0 because of LCTRRST. But if pin 2 (the "clear" signal) on UF8 was disconnected, the counter would just carry on where it left off: 1001 --> 1010. So the line counter wouldn't reset back to 0 like it should, but instead to 00001010 = 10 pairs of lines = row 20. The screen would start drawing from 20 rows down, which is exactly the screen that you see!
I got interested in this bit of circuit last year when the vertical sync disappeared from my SE/30. It turned out that cap goo ate out one of the traces attached to UF8, between the chip and the via. The break wasn't even visible under a microscope, but there was no continuity. Soldering a little piece of wire (red circle) solved the problem. The yellow arrows are the pins I'd check first, though it's easy enough just to check them all:
IMG_2487.jpg
The fact that the SE/30 video circuit is discrete logic opens up some interesting possible hacks. I'm thinking that by modifying the wiring to UG6 and editing the video ROM, it might even be possible to cram a few more lines on the screen.
Sorry for long post. This theory may be way off...
Your response is encouraging and has the logic that was looking for.
Where have you been all this time?
I checked that there is continuity between UF8 pin 2, UF8 pin 12, and UG6 pin 15. I think that the next step is replace UF8.
I'll trying to get one of these ICs and will leave doubts.
Thank you.
After this long wait, finally I get the IC
And this is the result:
@apm, hits the nail on the head !!
Thank you very much friend, you really know.
Mystery solved, and also having found the logical explanation of the problem, that is how we all learn.
Thanks to all.
And this is the result:
@apm, hits the nail on the head !!
Thank you very much friend, you really know.
Mystery solved, and also having found the logical explanation of the problem, that is how we all learn.
Thanks to all.
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I'm glad you fixed your Mac. Congrats!
It seems related to my Mac128k problem at https://68kmla.org/forums/index.php?/topic/15951-whats-wrong-with-my-1984-macintosh/
I hope someone can help me fix it too.
It seems related to my Mac128k problem at https://68kmla.org/forums/index.php?/topic/15951-whats-wrong-with-my-1984-macintosh/
I hope someone can help me fix it too.
Naw, that's just my wife when she finds I've brought home yet another 68k.
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