Designing a portable RAM card

[techknight]

I decided to spin this off from my other thread. There seems to be some interest in this, so i decided to move on with the project. 

Here is my progress so far: 



Still alot to go, but so far so good. Got the busses done, just need to get all the signal/enable/CPLD lines ran. 

Turns out the apple guide to the family hardware is the correct one. the developer note is incorrect in pin numbering on the socket but the number to signal table figure appears right, and the designing cards and drivers for macintosh is completely wrong. pins and all. 

 

[Paralel]

Gotta love it, supposed "reliable" sources of information turn out to be anything but.

 

[techknight]

Yea, i bet that caused some havok for RAM card makers back in the day. lol. 

Anyway, more progress. Pretty much complete to operate as stock. 

Just have to add a couple jumpers, extra connection points for the DTACK and /AS line for full 9MB extended addressing. Then of course i need to add the decoupling caps, and route the board. 

 

[techknight]

No thoughts? hmm... Guess its a monologue

Anyway, board routing time!

 

[uniserver]

one word for you sir,  awesome!

So again this will work with the 5120 or 5126?

 

[techknight]

both. In theory, it should be universal. 

the difference between the two models, the Backlit has a Refresh line, whilst the original does not. And the backlit /AS becomes /RAMCS, meaning its stuck at a 5MB ceiling, which is why I will have a pin to allow a wire to branch off to the next slot to pick up /AS for the full 9MB. 

I will also have a DTACK pin as well, that will connect to the CPU DTACK line to allow the remaining 4MB of address space to be mapped to RAM without throwing bus errors. 

In a nutshell, if you want all 9MB, you will have 2 plug-in wires coming of the board going to the ROM slot. or maybe PDS. If you dont want wires, your stuck at 5MB. 

 

[techknight]

took 3 hours just to get this far. Routing is FUN!!! Not... its anything BUT that.... 

 

[Paralel]

Not a monologue as much as a rapt audience waiting for each piece to appear as you make them.

 

[olePigeon]

I'm a liberal arts major.  I could provide some useful input on how pretty those pictures are, if that helps.

 

[techknight]

speaking of pretty pictures.Staring at those trace lines and routing new ones after several hours, its screwing with my vision.

 

[Macdrone]

Well my 5120 ram causes chimes in my 5126 and vise versa.

If your design will work in both is the incorrect information why the originals don't?

 

[techknight]

Going to call it quits for today. Starting to get a headache. However, All the data/address lines are ran between TSOPs. 

 

[techknight]

because as I mentioned before, two lines are switched and changed between the two models. the Backlit model has a Refresh signal, portable model does not. 

Here is an apple doc explaining why:

http://24.52.155.15/dissport/Port_Dev_Blit.pdf

My setup, it should not matter. 

 

[techknight]

Couldnt help myself, once I am on a roll, I tend to keep going. After taking a break, Made more progress... 

 

[uniserver]

once I am on a roll, I tend to keep going

I'm the same way.

lol you beast.

 

[techknight]

little bit more routing done before I hit the sack. 

 

[trag]

No thoughts? hmm... Guess its a monologue

Anyway, board routing time!

You're doing great. We'll jump in if you screw up.

Plus, I don't access the internet much on the weekends, when you're likely to be making progress on this.

 

[techknight]

Well if I screw up, its going to be how I am using the CPLD and its assigned pins. This my first time ever doing a custom CPLD thingy. 

 

[techknight]

More progress. its all routed! Just have to draw the ground planes and clean up those airwires.