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Attached is my spec for the ROMBUS controller, in case anyone is interested. I have selected addresses 0x41FFD0-0x41FFE3 for the ROMBUS registers, and have also successfully used a Mac Plus ROM with these bytes overwritten in Mini vMac. I will get back to this project once the ROM SIMM project...

oops, double post

Now that our Mac II ROM SIMM is almost finished, my friend Garrett and I are getting ready to move on to some of our future classic Mac projects. Next on the to-do list is our "ROMBUS" microSD interface for Mac Plus and 512K. One of our Mac Pluses is broken (E0122 SCR is dead), and the other...

Alright, I think I've got the driver working perfectly now. Only thing left to decide on is, what ROM checksum should I use? Once I put the checksum in, we will be ready to send some 2MB SIMMs out to test before we do the commercial release. Who would like to test? We wanna give several units...

Yeah, I consider disabling the RAM test to be a must-have feature. We are also considering doing a software option to enable/disable the RAM test. It can maybe be done, but there seem to be several issues. Turbo040 puts its 128 kB ROM right after the 512 kB stock ROM. This space is currently...

Actually, there isn't so much room in the 2MB SIMM for System 7. It can be done, but would 6.0.8 be better on the 2MB and 7.0/7.1 on the 8MB? Here's a picture of the control panel we are developing so far: To accommodate these settings, I'm diverging from the driver lifecycle implemented...

I fixed the driver and now it's working well in ROM disk mode. There's still a bit of work to do on the RAM disk function. I basically copied the idea of allocating the RAM disk in accRun from bbraun, but I think that approach is causing problems. I believe my IIsi tries to write to disk before...

Thanks for the advice. The machine crashed when I did an A9FF trap, so I guess microbug was not initialized, but the experiment was informative enough in that it told me that the Mac was getting to the end of Prime(...). The issue turned out to be that I had forgotten to call the I/O completion...

Hi everyone, My friend and I recently made a batch of 2MB ROM SIMMs for the SE/30 and Mac II machines. We wanted a few of these ourselves as well as to sell through our little company (price will be $25 incl. domestic US shipping): We have also finished a design for an 8MB ROM SIMM (actually...

Well, unique addresses as seen by the ROM sockets, so 16-bit words. I will assume for now that we can locate the I/O registers at the end of the ROM where the initials are and finalize my thoughts into a spec. I figured that we would ship the Mac Plus/512Ke ROM on all boards,  thus upgrading...

Update: As I said in my last message, I scrapped the previous design and redid it to use a microSD: The microSD slot is on the bottom left of the board. (shown without a 3d model) @Dog Cow In order to finish defining the SPI interface used to talk to the microSD, I need 4-8 spots in the...

Here’s the link: https://www.applefritter.com/content/five-new-opensource-appleii-cards-coming-soon-we-need-your-help RAM2E is gonna be released in a week or two, having been tested by several others with no problem. GR8RAM and Time Machine are working in my lab but one tester reports an...

@Dog Cow Great. The new layout is approaching completion: My goal is to have the board finished in the next day or two, but it will be another 2-3 weeks until I have boards fabricated, and then another week or two to receive the boards. While the board fabrication is being done, I will...

I have resolved to scrap the current ROMBUS boards and layout and do a new revision of which should be compatible with the Mac 512k. I have switched to a physically smaller CPLD (the somewhat ancient MACH5LV, but I can source 1000+ of them for cheap) and switched the ROMs to surface-mount...

@olePigeon Certainly there can be some software to change the boot icon in the ROM. As for on the board, maybe, but I have been trying to pursue a really sparse visual style for the boards I've been making. The #1 rule is no URLs, since that basically ruins any hope of making the board look like...

The ECL circuitry on the E-Machines card caught my eye. Nice!! That kind of circuitry was once the choice of high-speed test equipment, mainframes, military radar signal processing electronics, etc. I can see two 10H141-series shift registers, a 10H016 counter, and a 10H131 flipflop, all to...

Wait, no, there is a slight problem. I have an idea to solve it. One sec. edit: fixed. Edits are shown in bold in my previous post.

I skimmed through this quickly so let me share what I know about this stuff, starting with the FC3 signal and the 24/32 bit LC address maps. The original Mac LC had a 68020 and no MMU. Although the addressing capability of the 68020 is 32 bits, a scheme like in the Mac II is used, where the top...

@maceffects Oops, somehow I missed your comment. I don't wanna be paid anything upfront... I don't like doing business that way. It would be much better to collaborate on a gizmo and then we can split the profits. Does the PDS card you are trying to run do DMA? If not, you can unidirectionally...

@GorgonopsYes, although each device reads out 4 bits at once, you have to specify a byte address to each flash, and then there are four in parallel, so yeah, an address as sent to the SPI flash chips refers to a 32-bit data word. But like you said, it doesn't matter, since we can just write the...