Three Slot Riser for 6400 - In search of the Mythical Slot C

[Trash80toHP_Mini]

View attachment 24449

The connector at the bottom has 194 pins, 97 on each side.    The pins aren't numbered in silk screen, so for my purposes, I numbered them from left to right on the front.   On the back, I did not flip the card over.   Pretend you're looking through the board, oriented as above, and the back pins are left to right, 98 - 194.     So pin 98 is opposite pin 1.  Pin 194 is opposite pin 97, in my system.

Pins run:  1 - 42, 43 - 87, 88 - 97;    98 - 139, 140 - 184, 185 - 194

where commas are the slot notches.

I found the following:

Pin 114         Slot C interrupt

Pin 113         Slot A interrupt

Pin 17           Slot B interrupt

Pin 76           Slot A REQ

Pin 77           Slot B REQ

Pin 79           Slot C REQ

Pin 174         Slot A GNT

Pin 175         Slot B GNT

Pin 177         Slot C GNT

Pin 153         Slot A IDSEL, ADD 13

Pin 55           Slot B IDSEL, ADD 14

Pin 151         Slot C IDSEL, ADD 15

Wow, that pinout is nothing like any standard of which I'm aware. Is that implemented on a single connector on the logic board or abutted connectors?

Anyway for the first three above, I found a pin on the comm slot which connected to what ought to be the next pin in the sequence of interrupts, GNTs or REQs.  I didn't check IDSEL.   So I strongly suspect it's an independent PCI slot.    Umax did some unnatural stuff on the S900, where the sold a combo U2 LVD SCSI card with 10/100 ethernet on board.   It only worked in slot 1 of the S900 and there was an extra little connector at the end of the PCI slot to provide extra signals to support the ethernet portion.  Then there was a hacked to the gills driver that added an OF script when made the ethernet portion appear as slot E, which is some kind of special legacy slot in the firmware or some such.  

Slot 1 = another connector on the Logic Board or ComSlot on the riser?

Slot E1 is the normal location of the CS2 EtherNet card. I imagine the OF script would be a system patch for the SCSI half of the card. I wonder how TattleTech reports the SCSI setup, if at all? A parallel might be the Futura II VidCard/EtherNet daughtercard combo which shared the same NuBus Slot ID?

Have you run TattleTech to see if the SCSI portion might be located at Slot D1? The PCI report might show D1 as available without having the card installed. D1 is a curious gap in the ID sequence of Alchemy. It's probably more likely that the SCSI implementation shares E1 though.

But it wouldn't make any sense for the C600 to use a similar system because anybody's card might be installed in the comm slot.  The E100 card, as it was called, was the only card that could use that extra connector in the S900.

That extra connector has how many pins? ComSlot2 connector is shorted six connections of a PCI connector and a gaggle of connections are dedicated to the CS2 modem. So the second connector probably fleshes CS2 out so as to support the full PCI spec?

Do the PM6400 and PM6500 use the same 194 pin connector for their riser cards?

Not even close. It's a standard PCI connector, but at least one reserved pins isn't, it's a direct connection to the REQ pin of Slot B1. INT A and INT C are connected to A5 which is +5V holding the coding high on Slot B1.

Haven't worked on Slot A1 yet other than to successfully install a VidCard directly into the MoBo sans riser.

All RA Rackmount risers I've tested appear to function as slot A1, with one possible exception. Can't put my hands on it for testing, hopefully it will turn up and not be the same card as another I'm trying to re-locate in hopes of modifying it to Slot B1 function. If/when I can do that, I should be able to spec the TwinSlot riser for TAM and the other single slot riser limited Macs. After that I can start playing Slot C1 mix-n-match games.

When you have a chance, could you buzz the connections between connectors for Slots C1, B1 and A1 to identify which lines on C1 are unconnected to either of the other two. Fifteen drop out between A1 and B1. I'll post a table when I can sort a couple of things out. The dropouts should be located between A6/B6 and A19/B19. The only outlier will almost certainly be the REQ line at A26. Which "Reserved" line Apple intended (provided?) for that one on the logic board riser slot is the mystery.

 

[Trash80toHP_Mini]

At long last, I've rendered the mess of boards, tables, doodles and pinouts spinning around in my head down into a single markup sheet! :blink:



View attachment ABCE-RiserProj-000.PDF

@trag any chance you can shed some light on how INT A-D are implemented on a logic board so as to define a Slot ID?

If we can noodle the mystery of those four lines out, aside from the 3.3V sense lines, the other three inputs are available on the CommSlot to implement Slot E1 on a riser. If I can't find REQ/SEL for C1 on the 6x00 connector, it may come to that, but four slots would be better. []

 

[trag]

In any given PCI slot, Apple has traditionally (in this generation, don't know about Intel and late PPC stuff) wired all four INTs together.   So there's a single unique INT per PCI slot.   Every slot has it's own unique INT.   So, when the interrupt manager (e.g. Grand Central on X500/X600) receives an interrupt, it knows exactly which slot it came from.    So, my guess is that  your PCI header on the 6400/6500 logic board runs a unique INT to each of the four INT pins in the header slot, but then runs just one of those four to each PCI slot on the riser card.  So each PCI slot on the riser card gets its own unique INT from the header slot and uses that one INT for all four INT pins in the slot.    

They would still need to steal some unused pins in that PCI header to provide Bus Grant and Bus Request lines to each of the riser card slots.

ASIDE:  This actually is a terrible way to do things, because the PCI spec. includes provisions for PCI-PCI Bridges to expand one PCI slot into up to 16 additional slots.    If one has installed a PCI-PCI Bridge all of its sub slots use the interrupt/interrupts available in the original slot.   If the OS is expecting to identify the slot from the unique interrupt, this doesn't support the spec. very well.     Apple's implementation does support a single layer of PCI-PCI Bridge, as far as I can tell, but it fails when one tries to have a bridge behind a bridge, which is also supported in the specification.   I suspect this Apple bug is related to how they rely on the uniqueness of their interrupts, but I'm not certain.

They should be identifying slots purely through the IDSEL system.

 

[Trash80toHP_Mini]

@trag Thanks, that explains quite a bit. Neither of the upper slots on the "Black Magic" riser will work when it's installed in any of the Beige G3's PCI slots. Not implementing PCI slots as intended in that manner jibes with Apple's substandardization history. Gotta recheck it. ISTR the Slot ID being passed on from the motherboard to the bottom slot, but I forget.

ISTR there being a total cutout between the four INT lines of Slot B1 from both Slot A1 AND the edge connector. I'll be rechecking that next.

Methinks they may be using the unique (hijacked reserved contact) SEL line (Init Device Select) as the Slot ID mechanism

 

[Trash80toHP_Mini]

All four INT lines are tied together on Slot B1. They connect to the edgecard at A9  .  .  .  which is RESERVED of course! :approve:

That's two down now, just four more RESERVED lines  .  .  .  in my reserve. []

 

[Trash80toHP_Mini]

@trag I think I may have cracked stealing Slot E1 for my multiple slot riser from CSII?

Do you think the INT~ line on the ComSlot II connector could be the equivalent of the unified INT A-D lines of the substandard Mac PCI Slot implementation?



View attachment Slot_E1_000.PDF

Slot C1 lines may or may not be present on the 6x00 riser connector, but If I can implement Slot E1 on an A/B header with nubbin card jumpers from CSII as a Mini PCI Slot on the solder side of the riser as I've diagrammed elsewhere, that'd be three slots in every Mac of this the series, including the TAM.

Gotta noodle out the 3.3V lines, figured on doing that last. Got that info handy in your noggin?

Edit: Configuring Slot B1 requires hacking into the generic three slot riser's "reserved" edgecard contacts. I've got a nubbin card made from a LittleRedRiser set to wire up CSII for a first run/hail Mary as it's much easier to implement. Any help on 3.3V voodoo would be much appreciated.

 

[Trash80toHP_Mini]

OK this is officially out of hand, from the DevNote's description of the PCI Signals::

IDSEL -  Initialization device select; used during configuration

It's fine on A1 (bottom slot) showing right up where it's supposed to on the edge card connector.

IDSEL on B1 (top slot) is another story entirely, the dang thing is tied to Address Line 14 on the 6400 riser! 8-o

So during bootup/setup, the system uses A14 to figure out how to talk to a card installed in Slot B1? And here I was thinking there weren't all that many "RESERVED" pins remaining to work through in search of the mythical Slot C1.  :lol:

One might assume this makes some perverted kind of sense, but  .  .  .

 

[trag]

IDSEL's are always wired to an address line.  That's how PCI works.  It's weird, but it makes sense.   I just can't remember how at the moment, or I'd wander off into one of my long explanations.  IIRC, it has something to do with holding some command lines a certain way at initialization and then walking the address lines until a slot sees it on their IDSEL line and responds.

Anyway, from what I saw in the C600 riser, I think you'll find IDSEL for slot A goes to address 13, slot B to address 14, slot C to address 15, and I bet whichever pin is used for IDSEL in the comm slot goes to add 16.

 

[Trash80toHP_Mini]

THX, that now makes a lot of sense to me in terms of the cascading nature of PCI slot addressing voodoo.

I took a quick look at the remaining lines that are cutout between A1 and B1. Notes are at work for later perusal and I don't remember offhand if it's either PRSNT1 or PRSNT2 that appears to be problematic. Slot A1 connects to the proper contact on the edgecard, but on B1 that pin seems to drop off the ends of the earth. Weird stuff.

It's currently looking like hijacking Slot E1 might be a more productive avenue of approach than the Slot C1 quest.

 

[Trash80toHP_Mini]

View attachment wiremess-000,pdf

 

[Trash80toHP_Mini]

OOPSIE! That comma wasn't helpful at all. :

View attachment wiremess-000.pdf

I've got most of it worked out in a convoluted mess of a diagrams, doodles and tables, but now I've narrowed it down to something practical. I can begin prototyping by hacking together a pair of Flex-Cable PCI Risers, adding a jumper block configuration setup. The few CS2 edge connector lines from that beheaded riser will be woven through the web of the modified PCI Slot riser. the setup will allow testing the Slot B1 patch and an attempt to blow ComSlot2 out to full spec PCI Slot E1 in the same connector bolted up to the side panel of the BenchMac 6500.

Then/if/when, I can poke around for the missing lines for Slot C1. The info that IDSEL is tied to A15 is a major step of that campaign, THX, trag! Time for more doodling at work.

 

[Trash80toHP_Mini]

Decided I need to be able to test the WireMess for baseline function as unadulterated Slot A1, more doodling.

View attachment SlotSearch-010.PDF

 

[Trash80toHP_Mini]

 

[Trash80toHP_Mini]

FAIL - first stab at converting the ComSlotII to a full PCI Slot didn't work, but I really wasn'texpecting it to work right out of the gate, if ever.

Flexible ribbon cable risers came in today for converting Slot A1 to B1 and to poke around looking for C1, but it's a little complicated to jump right into. So I couldn't resist cobbling together a ComSloII riser to jumper the four required signal lines (Green, Orange, Blue, Red) to the header block of the jumper configurable three slot riser. Oh well, we'll see what the next setup yields.

@trag  I left the 3.3V Key pins (A12/A13/B12/B13) floating on the first try and grounded them on the second. Didn't figure it mattered because a 3.3V slotted riser works fine as A1. Does it matter after all? Gotta get B1 right for the low profile twin slot adapter. C1's a unicorn hunt.

 

[Trash80toHP_Mini]

I'm back on the hunt for the Mythical Slot C some six years later. Continuing the original thread as there's so much info in it.

- I've built the test setup based upon a single slot, ribbon cable PCI riser as planned
- GRANT lines are set up for Slot A or Slot B selection - makes no difference so far as I'd expected
- remaining RESERVED lines are split out and tagged for future testing



Time to take a look at wiring up the rest of that mess!

IDSEL's are always wired to an address line. That's how PCI works. It's weird, but it makes sense. I just can't remember how at the moment, or I'd wander off into one of my long explanations. IIRC, it has something to do with holding some command lines a certain way at initialization and then walking the address lines until a slot sees it on their IDSEL line and responds.

Anyway, from what I saw in the C600 riser, I think you'll find IDSEL for slot A goes to address 13, slot B to address 14, slot C to address 15, and I bet whichever pin is used for IDSEL in the comm slot goes to add 16.

I take it I'll need to place a tap on those address lines in the form of a "T" for connection to IDSEL as the next step?

@Melkhior I learned quite a bit from your in depth explanation in the other thread. Does this approach make sense to you?

Aim here is to set up the CableMonster to be set up as Slots A-C as on the three slot SuperMac riser @trag hopefully still has in his grubby little paws?

 

[Daniël]

There may be a way to figure this out without shooting too much in the dark. Gazelle reused PSX and O'Hare, and effectively has four PCI slots available out of O'Hare. One goes to the ATi Rage II, one to the COMM slot, and two to the PCI riser slot. The difference is that Alchemy's Valkyrie-AR video IC talks directly to the CPU, thus not using a PCI slot.

So, it can be deduced that Alchemy is only using three of four PCI slots available to it from O'Hare, with the exception of clones that did break it out to three PCI slots and one COMM slot. So, one could reasonably assume that Gazelle's PCI_VIDEO_GRNT and PCI_VIDEO_REQ would have been SLOT3 on Alchemy, if we reference the Gazelle schematics:


The ATI chip receives "VIDEO_INT" instead of "PCI_SLOT3_INT", but as it's not listed as a PCI specific interrupt, I would assume PCI_SLOT3_INT would belong to PCI_SLOT3_GRNT and PCI_SLOT3_REQ on Alchemy.

As for IDSEL, the Gazelle board sets those with a 22 Ohm resistor between the slot or device IDSEL line and a specific address line.

From the schematic, that is:

OHARE_IDSEL -> AD16
PCI_SLOT1_IDSEL -> AD13
COMM_SLOT_IDSEL -> AD17
VIDEO_IDSEL -> AD18

The riser isn't documented, but I would guess PCI_SLOT2_IDSEL would be AD14.
They didn't reuse AD15 for IDSEL on the ATI, skipping to AD18 instead.

Hopefully this can help out

 

[Daniël]

Now that I'm home, and I already have my Performa 6400 logic board out, I got curious myself.
On the Gazelle schematic, there is actually a connection for PCI_SLOT3_INT on A11.



On Alchemy, I can confirm it is a direct connection to pin 117 on O'Hare, as well as pin 136 on the cache connector (PCI_SLOT3_INT travels there too, for some reason).
Right, so, one of three signals, with GNT and REQ left to figure out.

Well, there's a reserved pin on side B, B10, which is near PCI_SLOT_REQ on B18 and and PCI_SLOT_REQ2 on B14.
Steps of four, so I checked continuity from B10 to pin 13 of U23 (74F32 on Alchemy, which is U20 on Gazelle):



Yes, there is a connection from pin 13, the REQ signal on 74F32, to B10!
So that's wired up, leaving just MOD_SLOT3_GNT, which should be on pin 11 of U23.

Well, on side A, near MOD_SLOT2_GNT on A14 and MOD_SLOT1_GNT on A17, there's another reserved pin on A19.
Sure enough, continuity to pin 11 of U23, which should be MOD_SLOT3_GNT on Alchemy!

So, in short, the PCI slot on the Performa 6400 and 5400 boards, is actually capable of taking a three PCI riser card, if wired up correctly.
I think that should bring the mythical Slot C to reality

 

[Daniël]

Gone ahead and ordered on of these three PCI riser cards, meant for rackmount equipment.
They use little PCI fingers to grab the slot-specific lines, so I imagine these will be relatively easy to hack to make them properly wired up for Slot A, B and C.



It'll need its PCI keying... modified... but that shouldn't be too difficult with the right tools.
I'll also probably need one of those flexible PCI slot extenders to move this mess outside of the 6400's case, as it won't fit like this

Also, on a 6500 board with damaged ATi VRAM traces, I've decided to just forgo the ATi Rage II entirely, in favor of just obtaining the third PCI slot again, which I did by rerouting the PCI_VIDEO_GNT and PCI_VIDEO_REQ signals on U20 back the according pins the Alchemy boards use for Slot C.

A bonus to pulling the ATi chip, is that the PCI bridge problem also goes away.
Can't have buggy ATi Rage II fCode if there's no ATi Rage II chip

@Trash80toHP_Mini Do let me know if you try wiring that flexible riser for Slot C based on the above info, you're probably able to get to try this before I do, as the PCI riser bits will take a while to get here

 

[Trash80toHP_Mini]

So glad you've joined in the Quest! I'll have to go over your posts with due attention when I'm fully awake (and sober) when I get a chance, so take the following with a bit of consideration.

Bypassing crappy onboard video in lieu of a great PCI Card is genius, I think! Downside there might be loss of the direct pipelining of Video Card output into the bluescreened blank window of Apple Video Player? Using a DVD Decoding PCI Card works for me!

Unfortunately, I've tried several "standard" PCI Riser boards such as you've ordered and none have worked.

Apple's implementation of PCI pre-BeigeG3 was atrocious, taking all kinds of liberties with what was supposed to be an industry standard. The Riser you ordered will work just fine in BG3, but won't work at all in the Alchemy/Gazelle morass of Apple standards bastardization if my so long ago experience has any merit. In adoption of the budding NuBus standard, Apple went their own way, implementing a Slot Specific Signal in a totally non-standard setup. Same for Alchemy and its follow on Gazelle Architectures.

On the two slot 6400/6500 riser, Slot_A is wired where it's supposed to be at B18_Request, but Slot_B is wired to B14_ RESERVED. That I noted so long ago.

Just found another bastardization in the last day or so: Slot A on the 6x00 riser connects to A7-Interrupt C as might be expected. However Slot B connects instead to A9_Reserved as opposed to any standard PCI setup.

Spelunking continues . . .

 

[Trash80toHP_Mini]

WOW! Blown away, when and from where were those 6500 schematics unearthed during the last six years?

Am I missing something? There doesn't appear to be a schematic of the twin slot riser.

 

[Trash80toHP_Mini]

Looking at your posts over coffee. You've confirmed something I'd figured might be required on the Logic Board:

As for IDSEL, the Gazelle board sets those with a 22 Ohm resistor between the slot or device IDSEL line and a specific address line.

Haven't metered it yet, but R1 on the Riser is the only active component and likely 22 Ohm as well from what you're saying. I'd figured that IDSEL for Slot_A and for CSII must have thw "resistive connection" defined in DCaDftPMC to the requisite Address Lines on the LB.

This one jumped out at me the first time I began looking at the Riser:

I've been mulling over the best way for me to develop a precise DELTA Map for modification of a new CableMonster from scratch. I think this representation may be the way for me to go with it.

Haven't yet grokked schematics, I've been looking at circuitry in terms of an electron plumbing diagram, working thru the Development Tomes and Developer Notes in crazy projects.

So glad you're opening up a new front for this campaign. With you working your way up to the Logic Board slot from the schematic and me digging my way down to it from the Riser I'm thinking we might make good progress?



@trag any chance you could jump in again with your take on Apple's mangling or the PCI Spec?