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ROMBUS - 64 MB flash interface for Mac Plus

ZaneKaminski

Well-known member
Here’s the link: https://www.applefritter.com/content/five-new-opensource-appleii-cards-coming-soon-we-need-your-help

RAM2E is gonna be released in a week or two, having been tested by several others with no problem. GR8RAM and Time Machine are working in my lab but one tester reports an incompatibility with the CFFA3000 card, which is currently out of production and I can’t obtain, so they are held up.

Mouserial and Library Card are next on the list to finish, but they both have an MCU, which makes them more complex.

As for this project, I completed the new layout with the additional SRAM for 512k compatibility but I didn’t like the cost, especially once I added the proper type of DIP headers. So I will be redoing it to use a microSD card, at the expense of being a bit slower. The CPLD on the board will implement a straightforward SPI interface between the Mac and the microSD card running at 25 MHz, so the peak bandwidth will be 25 Mbit/sec or just over 3 MBytes/sec. 

 

ZaneKaminski

Well-known member
Update: As I said in my last message, I scrapped the previous design and redid it to use a microSD:

Screen Shot 2020-01-24 at 3.59.02 PM.png

The microSD slot is on the bottom left of the board. (shown without a 3d model)

@Dog Cow In order to finish defining the SPI interface used to talk to the microSD, I need 4-8 spots in the 512Ke/Plus ROM which are "don't cares." These locations will serve as I/O registers to operate the SPI interface. You seem to have done more software work with the Macintosh 512ke/Plus than I have, so maybe you can pick 4-8 addresses to try for this purpose, preferably contiguous. Then we can modify a ROM to garble the data at those addresses and make sure it works in Mini vMac.

 

Dog Cow

Well-known member
@Dog Cow In order to finish defining the SPI interface used to talk to the microSD, I need 4-8 spots in the 512Ke/Plus ROM which are "don't cares." These locations will serve as I/O registers to operate the SPI interface.
By "spots" do you mean "bytes" ?

Off the top of my head, I can name the "Stolen from Apple Computer" icon as something that could be overwritten. Or at the tail end of the ROM are several sets of initials which could be overwritten.

A little more obscure are the Toolbox traps for resource references. Basically nobody used references, according to Apple, and they were deprecated in the 128K ROM. Thus the code could be overwritten for your purposes.

The resource reference traps may have been completely removed in the 128K ROM. I'd need to do some more checking on this.

By the way, you probably already know this, but the ROM has a 4 MB address space, however on the 128K/512K motherboard, there's only enough address lines to the sockets to address 128K of ROM. Perhaps this fact could be used to advantage on 64K ROM machines...

 
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Crutch

Well-known member
The resource reference traps may have been completely removed in the 128K ROM. I'd need to do some more checking on this.
Yes. _AddReference and _RmveReference were removed from the 128k ROM per Technical Note #2. 

 

ZaneKaminski

Well-known member
By "spots" do you mean "bytes" ?

Off the top of my head, I can name the "Stolen from Apple Computer" icon as something that could be overwritten. Or at the tail end of the ROM are several sets of initials which could be overwritten.
Well, unique addresses as seen by the ROM sockets, so 16-bit words. I will assume for now that we can locate the I/O registers at the end of the ROM where the initials are and finalize my thoughts into a spec.

By the way, you probably already know this, but the ROM has a 4 MB address space, however on the 128K/512K motherboard, there's only enough address lines to the sockets to address 128K of ROM. Perhaps this fact could be used to advantage on 64K ROM machines...
I figured that we would ship the Mac Plus/512Ke ROM on all boards,  thus upgrading 128Ks and 512Ks to "e." It will be very tricky to load the driver from ROM, but it can be done. We will have to bank-switch some of the ROM out to access the SD card driver and copy it to the system heap on boot so that it can be called in the normal way. 

 

ZaneKaminski

Well-known member
Attached is my spec for the ROMBUS controller, in case anyone is interested. I have selected addresses 0x41FFD0-0x41FFE3 for the ROMBUS registers, and have also successfully used a Mac Plus ROM with these bytes overwritten in Mini vMac. I will get back to this project once the ROM SIMM project wraps up.

View attachment ROMBUS Spec.pdf

 

ZaneKaminski

Well-known member
I've updated the spec to fix a few mistakes, and I've also added some sample code to operate the ROMBUS from the Mac, which I'll reproduce below:  View attachment ROMBUS Spec.pdf

#define SIGR_WR ((short*)0x41FFE0)
#define CSR_WR ((short*)0x41FFD8)
#define CSR_RD ((short*)0x41FFD0)
#define RXR_RD ((short*)0x41FFD2)
#define RXR_RD_SH8 ((short*)0x41FFD4)
#define TXR_WR ((short*)0x41FFDA)
#define TXR_WR_SH8 ((short*)0x41FFDC)

void rbus_enable { *SIGR_WR = 0xC1AD; }
void rbus_disable { *SIGR_WR = 0x0000; }
void spi_select() { *CSR_WR = 0x8000; }
void spi_deselect() { *CSR_WR = 0x0000; }

char spi_transfer8(char x) {
*TXR_WR_SH8 = x;
return *RXR_RD;
}

char spi_transfer8_slow(char x) {
char ret;
int i;
for (i = 0; i < 8; i++) {
// Shift MISO into return value
ret <<= 1;
ret |= (*CSR_RD >> 13) & 1;
// Pulse clock hi then lo
*CSR_WR = 0xC000;
*CSR_WR = 0x8000;
// Clock out MOSI after clock goes lo
*TXR_WR = (x << (8 + i)) & 0x8000;
}
return ret;
}

char delay_100us() {
__asm__ __volatile__ (
" move.l #100, %%d0 \n\t"
"1: subq #1, %%d0 \n\t"
" bne 1b \n\t"
: /* out */
: /* in */
: "d0" /* clobbered */);
}


This code is designed to provide the HAL layer for Elm-ChaN's SD/MMC library, making it easy to integrate that open-source, well-tested code into a future ROMBUS driver.

Edit: Also the boards for Macintosh Plus and Macintosh 512/128 are finished:

ROMBUS for Plus.pngROMBUS for 512.png

We will be sending these to production in a few weeks once we release the 2MB and 8MB Mac II ROM SIMMs.

 
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